* [PATCH v2] mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1
@ 2016-12-10 10:44 Shyam Sundar S K
2016-12-11 0:20 ` kbuild test robot
0 siblings, 1 reply; 3+ messages in thread
From: Shyam Sundar S K @ 2016-12-10 10:44 UTC (permalink / raw)
To: Adrian Hunter, Ulf Hansson
Cc: linux-mmc, Sen, Pankaj, Shah, Nehal-bakulchandra,
Agrawal, Nitesh-kumar
This patch adds support for HS200 tuning mode on AMD eMMC-4.5.1
Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com>
Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Reviewed-by: Agrawal, Nitesh-kumar <Nitesh-kumar.Agrawal@amd.com>
Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
---
drivers/mmc/host/sdhci-pci-core.c | 155 +++++++++++++++++++++++++++++++++++++-
1 file changed, 152 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
index 1d9e00a..b2b8a82 100644
--- a/drivers/mmc/host/sdhci-pci-core.c
+++ b/drivers/mmc/host/sdhci-pci-core.c
@@ -817,6 +817,143 @@ enum amd_chipset_gen {
AMD_CHIPSET_UNKNOWN,
};
+/* AMD registers */
+#define AMD_SD_AUTO_PATTERN (0xB8)
+#define AMD_MSLEEP_DURATION (4)
+#define AMD_SD_MISC_CONTROL (0xD0)
+#define AMD_MAX_TUNE_VALUE (0x0B)
+#define AMD_AUTO_TUNE_SEL (0x10800)
+#define AMD_FIFO_PTR (0x30)
+#define AMD_BIT_MASK (0x1F)
+
+static int amd_tuning_reset(struct sdhci_host *host)
+{
+ unsigned int val;
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+
+ val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+ val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING;
+ sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
+
+ val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+ val &= ~SDHCI_CTRL_EXEC_TUNING;
+ sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
+
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ return 0;
+}
+
+static int amd_config_tuning_phase(struct sdhci_host *host, u8 phase)
+{
+ struct sdhci_pci_slot *slot = sdhci_priv(host);
+ struct pci_dev *pdev = slot->chip->pdev;
+ unsigned int val;
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+
+ pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val);
+ val &= ~AMD_BIT_MASK;
+ val |= (AMD_AUTO_TUNE_SEL | (phase << 1));
+ pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val);
+
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ return 0;
+}
+
+static int amd_enable_manual_tuning(struct sdhci_pci_slot *slot)
+{
+ struct pci_dev *pdev = slot->chip->pdev;
+ unsigned int val;
+
+ pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val);
+ val |= AMD_FIFO_PTR;
+ pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val);
+
+ return 0;
+}
+
+static int amd_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+ struct sdhci_pci_slot *slot = sdhci_priv(host);
+ struct pci_dev *pdev = slot->chip->pdev;
+ unsigned int val;
+ unsigned long flags;
+ u8 ctrl, tune_around, valid_f = 0, valid_win_max = 0;
+ u8 tune_low_max = 0, tune_low = 0, valid_win = 0, tune_res = 0;
+ bool this_tune_ok = 0, last_tune_ok = 0;
+
+ amd_tuning_reset(host);
+
+ /*********************************************************************/
+ /* Enabling Software Tuning */
+ /********************************************************************/
+ /* 1. First switch the eMMC to HS200 Mode
+ * 2. Prepare the registers by using the sampling clock select
+ * 3. Send the CMD21 12 times with block length of 64 bytes
+ * 4. Everytime change the clk phase and check for CRC error
+ * (CMD and DATA),if error, soft reset the CMD and DATA line
+ * 5. Calculate the window and set the clock phase.
+ */
+
+ for (tune_around = 0; tune_around < 12; tune_around++) {
+ amd_config_tuning_phase(host, tune_around);
+
+ if (mmc_send_tuning(host->mmc, opcode, NULL)) {
+ this_tune_ok = false;
+ host->mmc->need_retune = 0;
+ msleep(AMD_MSLEEP_DURATION);
+ ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA;
+ sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET);
+ } else {
+ this_tune_ok = true;
+ valid_f += 1;
+ }
+
+ /* find good phase */
+ if ((!this_tune_ok && last_tune_ok) || (tune_around == 11)) {
+ if (valid_win > valid_win_max) {
+ valid_win_max = valid_win;
+ tune_low_max = tune_low;
+ }
+ }
+
+ if (this_tune_ok && (!last_tune_ok))
+ tune_low = tune_around;
+ if (!this_tune_ok && last_tune_ok)
+ valid_win = 0;
+ else if (this_tune_ok)
+ valid_win += 1;
+
+ last_tune_ok = this_tune_ok;
+
+ if (tune_around == 11) {
+ if ((valid_f + valid_win) > valid_win_max) {
+ if (valid_f > valid_win)
+ tune_res = ((valid_f - valid_win) >> 1);
+ else
+ tune_res = tune_low + ((valid_win +
+ valid_f) >> 1);
+ } else {
+ tune_res = tune_low_max + (valid_win_max >> 1);
+ }
+
+ if (tune_res > AMD_MAX_TUNE_VALUE)
+ tune_res = AMD_MAX_TUNE_VALUE;
+
+ amd_config_tuning_phase(host, tune_res);
+ }
+ }
+ host->mmc->retune_period = 0;
+
+ amd_enable_manual_tuning(slot);
+ return 0;
+}
+
static int amd_probe(struct sdhci_pci_chip *chip)
{
struct pci_dev *smbus_dev;
@@ -839,16 +976,17 @@ static int amd_probe(struct sdhci_pci_chip *chip)
}
}
- if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
+ if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ))
chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
- chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
- }
return 0;
}
+static const struct sdhci_ops amd_sdhci_pci_ops;
+
static const struct sdhci_pci_fixes sdhci_amd = {
.probe = amd_probe,
+ .ops = &amd_sdhci_pci_ops,
};
static const struct pci_device_id pci_ids[] = {
@@ -1469,6 +1607,17 @@ static const struct sdhci_ops sdhci_pci_ops = {
.select_drive_strength = sdhci_pci_select_drive_strength,
};
+static const struct sdhci_ops amd_sdhci_pci_ops = {
+ .set_clock = sdhci_set_clock,
+ .enable_dma = sdhci_pci_enable_dma,
+ .set_bus_width = sdhci_pci_set_bus_width,
+ .reset = sdhci_reset,
+ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ .hw_reset = sdhci_pci_hw_reset,
+ .select_drive_strength = sdhci_pci_select_drive_strength,
+ .platform_execute_tuning = amd_execute_tuning,
+};
+
/*****************************************************************************\
* *
* Suspend/resume *
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1
2016-12-10 10:44 [PATCH v2] mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1 Shyam Sundar S K
@ 2016-12-11 0:20 ` kbuild test robot
2016-12-11 2:43 ` Shyam Sundar S K
0 siblings, 1 reply; 3+ messages in thread
From: kbuild test robot @ 2016-12-11 0:20 UTC (permalink / raw)
To: Shyam Sundar S K
Cc: kbuild-all, Adrian Hunter, Ulf Hansson, linux-mmc, Sen, Pankaj,
Shah, Nehal-bakulchandra, Agrawal, Nitesh-kumar
[-- Attachment #1: Type: text/plain, Size: 1770 bytes --]
Hi Shyam,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.9-rc8 next-20161209]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Shyam-Sundar-S-K/mmc-sdhci-pci-Add-support-for-HS200-tuning-mode-on-AMD-eMMC-4-5-1/20161211-045148
config: x86_64-randconfig-b0-12110515 (attached as .config)
compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
drivers/mmc/host/sdhci-pci-core.c: In function 'amd_execute_tuning':
>> drivers/mmc/host/sdhci-pci-core.c:885: warning: unused variable 'flags'
>> drivers/mmc/host/sdhci-pci-core.c:884: warning: unused variable 'val'
>> drivers/mmc/host/sdhci-pci-core.c:883: warning: unused variable 'pdev'
At top level:
cc1: warning: unrecognized command line option "-Wno-maybe-uninitialized"
drivers/mmc/host/sdhci-pci-core.o: warning: objtool: sdhci_pci_probe()+0x8af: function has unreachable instruction
vim +/flags +885 drivers/mmc/host/sdhci-pci-core.c
877 return 0;
878 }
879
880 static int amd_execute_tuning(struct sdhci_host *host, u32 opcode)
881 {
882 struct sdhci_pci_slot *slot = sdhci_priv(host);
> 883 struct pci_dev *pdev = slot->chip->pdev;
> 884 unsigned int val;
> 885 unsigned long flags;
886 u8 ctrl, tune_around, valid_f = 0, valid_win_max = 0;
887 u8 tune_low_max = 0, tune_low = 0, valid_win = 0, tune_res = 0;
888 bool this_tune_ok = 0, last_tune_ok = 0;
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 25511 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1
2016-12-11 0:20 ` kbuild test robot
@ 2016-12-11 2:43 ` Shyam Sundar S K
0 siblings, 0 replies; 3+ messages in thread
From: Shyam Sundar S K @ 2016-12-11 2:43 UTC (permalink / raw)
To: kbuild test robot
Cc: kbuild-all, Adrian Hunter, Ulf Hansson, linux-mmc, Sen, Pankaj,
Shah, Nehal-bakulchandra, Agrawal, Nitesh-kumar
On 12/11/2016 5:50 AM, kbuild test robot wrote:
> Hi Shyam,
>
> [auto build test WARNING on linus/master]
> [also build test WARNING on v4.9-rc8 next-20161209]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>
> url: https://github.com/0day-ci/linux/commits/Shyam-Sundar-S-K/mmc-sdhci-pci-Add-support-for-HS200-tuning-mode-on-AMD-eMMC-4-5-1/20161211-045148
> config: x86_64-randconfig-b0-12110515 (attached as .config)
> compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
> reproduce:
> # save the attached .config to linux build tree
> make ARCH=x86_64
>
> All warnings (new ones prefixed by >>):
>
> drivers/mmc/host/sdhci-pci-core.c: In function 'amd_execute_tuning':
>>> drivers/mmc/host/sdhci-pci-core.c:885: warning: unused variable 'flags'
>>> drivers/mmc/host/sdhci-pci-core.c:884: warning: unused variable 'val'
>>> drivers/mmc/host/sdhci-pci-core.c:883: warning: unused variable 'pdev'
> At top level:
> cc1: warning: unrecognized command line option "-Wno-maybe-uninitialized"
> drivers/mmc/host/sdhci-pci-core.o: warning: objtool: sdhci_pci_probe()+0x8af: function has unreachable instruction
>
> vim +/flags +885 drivers/mmc/host/sdhci-pci-core.c
>
> 877 return 0;
> 878 }
> 879
> 880 static int amd_execute_tuning(struct sdhci_host *host, u32 opcode)
> 881 {
> 882 struct sdhci_pci_slot *slot = sdhci_priv(host);
> > 883 struct pci_dev *pdev = slot->chip->pdev;
> > 884 unsigned int val;
> > 885 unsigned long flags;
Apologies. Not sure why this was not caught on our build systems. Made a new submission by removing these unused variables.
> 886 u8 ctrl, tune_around, valid_f = 0, valid_win_max = 0;
> 887 u8 tune_low_max = 0, tune_low = 0, valid_win = 0, tune_res = 0;
> 888 bool this_tune_ok = 0, last_tune_ok = 0;
>
> ---
> 0-DAY kernel test infrastructure Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-12-10 10:44 [PATCH v2] mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1 Shyam Sundar S K
2016-12-11 0:20 ` kbuild test robot
2016-12-11 2:43 ` Shyam Sundar S K
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