From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Subject: Re: [PATCH v3 11/12] arm64: dts: marvell: add sdhci support for
 Armada 7K/8K
Date: Mon, 12 Dec 2016 21:18:46 +0100
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To: Russell King - ARM Linux <linux@armlinux.org.uk>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>, Ulf Hansson <ulf.hansson@linaro.org>, Adrian Hunter <adrian.hunter@intel.com>, linux-mmc@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>, Yehuda Yitschak <yehuday@marvell.com>, Marcin Wojtas <mw@semihalf.com>, Jason Cooper <jason@lakedaemon.net>, Hanna Hawa <hannah@marvell.com>, Kostya Porotchkin <kostap@marvell.com>, Nadav Haklai <nadavh@marvell.com>, Ziji Hu <huziji@marvell.com>, Jimmy Xu <zmxu@marvell.com>, Doug Jones <dougj@marvell.com>, Ryan Gao <ygao@marvell.com>, Jisheng Zhang <jszhang@marvell.com>, Victor Gu <xigu@marvell.com>, "Wei(SOCP) Liu" <liuw@marvell.com>, Wilson Ding <dingwei@marvell.com>, linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Hello,

On Mon, 12 Dec 2016 19:16:51 +0000, Russell King - ARM Linux wrote:

> I'd send something, but I don't know what the GIC interrupt number
> would be without using the CP110's ICU (which isn't supported in
> mainline yet.)

For now, mainline relies on a static mapping of CP interrupts to GIC
interrupts, via an ICU configuration done in ATF. It's pretty
straightforward to figure out the CP interrupts to GIC interrupt
mapping if you have access to the ATF source code. If you don't, I can
provide the necessary details.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com