[PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[Simon Horman]

Hi,

this series adds support for the internal DMAC used by r8a779[56] SoCs.
This is achieved by adding a new variant of the SDHI driver for this
DMA controller with compat strings for the r8a779[56] SoCs.
Compat strings for these SoCs are also removed from the existing SYS DMAC
variant of the SDHI driver.

Based on mmc/next

Headline performance boost: 9.5MB/s -> 39.7MB/s
Details below.

Simon Horman (3):
  mmc: tmio, renesas-sdhi: add dataend to DMA ops
  mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC
  mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver

Yoshihiro Shimoda (1):
  mmc: tmio, renesas-sdhi: add max_{segs,blk_count} to tmio_mmc_data

 drivers/mmc/host/Kconfig                      |  19 ++
 drivers/mmc/host/Makefile                     |   8 +-
 drivers/mmc/host/renesas_sdhi.h               |   2 +
 drivers/mmc/host/renesas_sdhi_core.c          |   2 +
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 271 ++++++++++++++++++++++++++
 drivers/mmc/host/renesas_sdhi_sys_dmac.c      |  29 +--
 drivers/mmc/host/tmio_mmc.h                   |   2 +
 drivers/mmc/host/tmio_mmc_core.c              |  16 +-
 include/linux/mfd/tmio.h                      |   2 +
 9 files changed, 323 insertions(+), 28 deletions(-)
 create mode 100644 drivers/mmc/host/renesas_sdhi_internal_dmac.c

-- 
2.1.4


Salvator-X/M3-W ES1.0
=====================

With Gen3 DMA Patches
---------------------

97ac7011f8d3 (topic/sdhi-gen3-dma-2017-v3) mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver

# dmesg | egrep '(sd|mmc)'
[    1.419150] sdhci: Secure Digital Host Controller Interface driver
[    1.425367] sdhci: Copyright(c) Pierre Ossman
[    1.430237] renesas_sdhi_internal_dmac ee100000.sd: Got CD GPIO
[    1.436224] renesas_sdhi_internal_dmac ee100000.sd: Got WP GPIO
[    1.564915] renesas_sdhi_internal_dmac ee140000.sd: mmc0 base at 0xee140000 max clock rate 200 MHz
[    1.574277] renesas_sdhi_internal_dmac ee160000.sd: Got CD GPIO
[    1.580250] renesas_sdhi_internal_dmac ee160000.sd: Got WP GPIO
[    1.595002] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.643641] renesas_sdhi_internal_dmac ee100000.sd: Got CD GPIO
[    1.649678] renesas_sdhi_internal_dmac ee100000.sd: Got WP GPIO
[    1.780987] renesas_sdhi_internal_dmac ee100000.sd: mmc1 base at 0xee100000 max clock rate 200 MHz
[    1.791301] renesas_sdhi_internal_dmac ee160000.sd: Got CD GPIO
[    1.797269] renesas_sdhi_internal_dmac ee160000.sd: Got WP GPIO
[    1.830209] mmc0: new high speed MMC card at address 0001
[    1.836044] mmcblk0: mmc0:0001 eMMC   28.8 GiB 
[    1.844818] mmcblk0boot0: mmc0:0001 eMMC   partition 1 4.00 MiB
[    1.854940] mmcblk0boot1: mmc0:0001 eMMC   partition 2 4.00 MiB
[    1.866738] mmcblk0rpmb: mmc0:0001 eMMC   partition 3 4.00 MiB
[    1.877064]  mmcblk0: p1
[    1.933007] renesas_sdhi_internal_dmac ee160000.sd: mmc2 base at 0xee160000 max clock rate 200 MHz
[    2.080957] mmc1: new ultra high speed SDR50 SDHC card at address e624
[    2.087962] mmcblk1: mmc1:e624 SU08G 7.40 GiB 
[    2.103240]  mmcblk1: p1
[    2.188956] mmc2: new ultra high speed SDR50 SDHC card at address 0001
[    2.195833] mmcblk2: mmc2:0001 00000 29.8 GiB 
[    2.209999]  mmcblk2: p1

# grep sd /proc/interrupts
100:        396          0     GIC-0 197 Level     ee100000.sd
101:        676          0     GIC-0 199 Level     ee140000.sd
102:        394          0     GIC-0 200 Level     ee160000.sd
178:          0          0  e6053000.gpio  12 Edge      ee100000.sd cd
197:          0          0  e6054000.gpio  15 Edge      ee160000.sd cd

# cat /sys/devices/platform/soc/ee100000.sd/mmc_host/mmc1/mmc1:*/cid
035344535530384780b1b8a11200d300
# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 13.4726 s, 39.8 MB/s
# dd if=/dev/urandom of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 25.1835 s, 21.3 MB/s
# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 20.9813 s, 25.6 MB/s

# cat /sys/devices/platform/soc/ee160000.sd/mmc_host/mmc2/mmc2:*/cid
1b534d3030303030103916141700f600
# dd if=/dev/mmcblk2 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 17.4752 s, 30.7 MB/s
# dd if=/dev/urandom of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 25.9727 s, 20.7 MB/s
# dd if=/dev/zero of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 21.4667 s, 25.0 MB/s

# grep sd /proc/interrupts
100:      90886          0     GIC-0 197 Level     ee100000.sd
101:        676          0     GIC-0 199 Level     ee140000.sd
102:      90884          0     GIC-0 200 Level     ee160000.sd
178:          0          0  e6053000.gpio  12 Edge      ee100000.sd cd
197:          0          0  e6054000.gpio  15 Edge      ee160000.sd cd

Without Gen3 DMA Patches
------------------------

2fe35968fecc (mmc/next) mmc: renesas-sdhi: improve checkpatch cleanness

# dmesg | egrep '(sd|mmc)'
[    1.415665] sdhci: Secure Digital Host Controller Interface driver
[    1.421875] sdhci: Copyright(c) Pierre Ossman
[    1.426803] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    1.431720] sh_mobile_sdhi ee100000.sd: Got WP GPIO
[    1.560977] sh_mobile_sdhi ee140000.sd: mmc0 base at 0xee140000 max clock rate 200 MHz
[    1.569334] sh_mobile_sdhi ee160000.sd: Got CD GPIO
[    1.574274] sh_mobile_sdhi ee160000.sd: Got WP GPIO
[    1.588023] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.637177] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    1.642138] sh_mobile_sdhi ee100000.sd: Got WP GPIO
[    1.769034] sh_mobile_sdhi ee100000.sd: mmc1 base at 0xee100000 max clock rate 200 MHz
[    1.778299] sh_mobile_sdhi ee160000.sd: Got CD GPIO
[    1.783226] sh_mobile_sdhi ee160000.sd: Got WP GPIO
[    1.838282] mmc0: new high speed MMC card at address 0001
[    1.848093] mmcblk0: mmc0:0001 eMMC   28.8 GiB 
[    1.856812] mmcblk0boot0: mmc0:0001 eMMC   partition 1 4.00 MiB
[    1.866898] mmcblk0boot1: mmc0:0001 eMMC   partition 2 4.00 MiB
[    1.876978] mmcblk0rpmb: mmc0:0001 eMMC   partition 3 4.00 MiB
[    1.886453]  mmcblk0: p1
[    1.909059] sh_mobile_sdhi ee160000.sd: mmc2 base at 0xee160000 max clock rate 200 MHz
[    2.085013] mmc1: new ultra high speed SDR50 SDHC card at address e624
[    2.096042] mmcblk1: mmc1:e624 SU08G 7.40 GiB 
[    2.225010] mmc2: new ultra high speed SDR50 SDHC card at address 0001
[    2.231895] mmcblk2: mmc2:0001 00000 29.8 GiB 

# grep sd /proc/interrupts
100:       1156          0     GIC-0 197 Level     ee100000.sd
101:       2980          0     GIC-0 199 Level     ee140000.sd
102:       1158          0     GIC-0 200 Level     ee160000.sd
178:          0          0  e6053000.gpio  12 Edge      ee100000.sd cd
197:          0          0  e6054000.gpio  15 Edge      ee160000.sd cd

# cat /sys/devices/platform/soc/ee100000.sd/mmc_host/mmc1/mmc1:*/cid
035344535530384780b1b8a11200d300
# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 56.9853 s, 9.4 MB/s
# dd if=/dev/urandom of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 33.6495 s, 16.0 MB/s
(run twice)
# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 28.9672 s, 18.5 MB/s

# cat /sys/devices/platform/soc/ee160000.sd/mmc_host/mmc2/mmc2:*/cid
1b534d3030303030103916141700f600
# dd if=/dev/mmcblk2 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 56.6979 s, 9.5 MB/s
# dd if=/dev/urandom of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 32.6627 s, 16.4 MB/s
# dd if=/dev/zero of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 28.0254 s, 19.2 MB/s

# grep sd /proc/interrupts
100:    4260209          0     GIC-0 197 Level     ee100000.sd
101:       2980          0     GIC-0 199 Level     ee140000.sd
102:    3194148          0     GIC-0 200 Level     ee160000.sd
178:          0          0  e6053000.gpio  12 Edge      ee100000.sd cd
197:          0          0  e6054000.gpio  15 Edge      ee160000.sd cd


Lager/H2 ES2.0
==============

With Gen3 DMA Patches
---------------------

97ac7011f8d3 (topic/sdhi-gen3-dma-2017-v3) mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver

# dmesg | egrep '(sd|mmc)'
[    2.310666] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    2.316097] sh_mobile_sdhi ee140000.sd: Got CD GPIO
[    2.375103] sh_mmcif ee220000.mmc: Chip version 0x0003, clock rate 12MHz
[    2.481791] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    2.695235] sh_mobile_sdhi ee100000.sd: mmc1 base at 0xee100000 max clock rate 195 MHz
[    2.703702] sh_mobile_sdhi ee140000.sd: Got CD GPIO
[    2.783372] mmc0: new high speed MMC card at address 0001
[    2.789193] mmcblk0: mmc0:0001 MMC08G 7.33 GiB 
[    2.793912] mmcblk0boot0: mmc0:0001 MMC08G partition 1 2.00 MiB
[    2.800052] mmcblk0boot1: mmc0:0001 MMC08G partition 2 2.00 MiB
[    2.807724]  mmcblk0: p1
[    2.915243] sh_mobile_sdhi ee140000.sd: mmc2 base at 0xee140000 max clock rate 97 MHz
[    3.152305] mmc1: new ultra high speed SDR104 SDHC card at address 0001
[    3.159305] mmcblk1: mmc1:0001 00000 29.8 GiB 
[    3.395217] mmc2: new ultra high speed SDR50 SDHC card at address 0001
[    3.402084] mmcblk2: mmc2:0001 00000 29.8 GiB 

# grep sd /proc/interrupts
 99:        325          0          0          0     GIC-0 197 Level     ee100000.sd
100:        295          0          0          0     GIC-0 199 Level     ee140000.sd
220:          0          0          0          0  e6053000.gpio   6 Edge      ee100000.sd cd
236:          0          0          0          0  e6053000.gpio  22 Edge      ee140000.sd cd

# cat /sys/devices/platform/ee100000.sd/mmc_host/mmc1/mmc1:*/cid
1b534d303030303010ed85537600fc00
# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 10.7666 s, 49.9 MB/s
# dd if=/dev/urandom of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 25.6582 s, 20.9 MB/s
# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 16.8331 s, 31.9 MB/s

# cat /sys/devices/platform/ee140000.sd/mmc_host/mmc2/mmc2:*/cid
1b534d303030303010f0c957f500fc00
# dd if=/dev/mmcblk2 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 15.2234 s, 35.3 MB/s
# dd if=/dev/urandom of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 30.2048 s, 17.8 MB/s
# dd if=/dev/zero of=/dev/mmcblk2 bs=1M count=512 oflag=direct
536870912 bytes (537 MB) copied, 21.3844 s, 25.1 MB/s

# grep sd /proc/interrupts
 99:      45879          0          0          0     GIC-0 197 Level     ee100000.sd
100:      45849          0          0          0     GIC-0 199 Level     ee140000.sd
220:          0          0          0          0  e6053000.gpio   6 Edge      ee100000.sd cd
236:          0          0          0          0  e6053000.gpio  22 Edge      ee140000.sd cd
 99:      46126          0          0          0     GIC-0 197 Level     ee100000.sd
100:      52421          0          0          0     GIC-0 199 Level     ee140000.sd
220:          0          0          0          0  e6053000.gpio   6 Edge      ee100000.sd cd
236:          0          0          0          0  e6053000.gpio  22 Edge      ee140000.sd cd

Without Gen3 DMA Patches
------------------------

2fe35968fecc (mmc/next) mmc: renesas-sdhi: improve checkpatch cleanness

# dmesg | egrep '(sd|mmc)'
[    2.311173] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    2.316724] sh_mobile_sdhi ee140000.sd: Got CD GPIO
[    2.375572] sh_mmcif ee220000.mmc: Chip version 0x0003, clock rate 12MHz
[    2.482393] sh_mobile_sdhi ee100000.sd: Got CD GPIO
[    2.695672] sh_mobile_sdhi ee100000.sd: mmc1 base at 0xee100000 max clock rate 195 MHz
[    2.704159] sh_mobile_sdhi ee140000.sd: Got CD GPIO
[    2.773784] mmc0: new high speed MMC card at address 0001
[    2.779592] mmcblk0: mmc0:0001 MMC08G 7.33 GiB 
[    2.784311] mmcblk0boot0: mmc0:0001 MMC08G partition 1 2.00 MiB
[    2.790422] mmcblk0boot1: mmc0:0001 MMC08G partition 2 2.00 MiB
[    2.798127]  mmcblk0: p1
[    2.915668] sh_mobile_sdhi ee140000.sd: mmc2 base at 0xee140000 max clock rate 97 MHz
[    3.172995] mmc1: new ultra high speed SDR104 SDHC card at address 0001
[    3.179996] mmcblk1: mmc1:0001 00000 29.8 GiB 
[    3.305653] mmc2: new ultra high speed SDR50 SDHC card at address 0001
[    3.314303] mmcblk2: mmc2:0001 00000 29.8 GiB 

# grep sd /proc/interrupts
 99:        327          0          0          0     GIC-0 197 Level     ee100000.sd
100:        289          0          0          0     GIC-0 199 Level     ee140000.sd
220:          0          0          0          0  e6053000.gpio   6 Edge      ee100000.sd cd
236:          0          0          0          0  e6053000.gpio  22 Edge      ee140000.sd cd

# cat /sys/devices/platform/ee100000.sd/mmc_host/mmc1/mmc1:*/cid
1b534d303030303010ed85537600fc00
# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 10.8066 s, 49.7 MB/s
# dd if=/dev/urandom of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 25.8626 s, 20.8 MB/s
# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 16.8923 s, 31.8 MB/s

# cat /sys/devices/platform/ee140000.sd/mmc_host/mmc2/mmc2:*/cid
1b534d303030303010f0c957f500fc00
# dd if=/dev/mmcblk2 of=/dev/null bs=1M count=512 iflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 15.2994 s, 35.1 MB/s
# dd if=/dev/urandom of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 30.2488 s, 17.7 MB/s
# dd if=/dev/zero of=/dev/mmcblk2 bs=1M count=512 oflag=direct
512+0 records in
512+0 records out
536870912 bytes (537 MB) copied, 21.3787 s, 25.1 MB/s

# grep sd /proc/interrupts
 99:      45881          0          0          0     GIC-0 197 Level     ee100000.sd
100:      45843          0          0          0     GIC-0 199 Level     ee140000.sd
220:          0          0          0          0  e6053000.gpio   6 Edge      ee100000.sd cd
236:          0          0          0          0  e6053000.gpio  22 Edge      ee140000.sd cd

[PATCH mmc/next v3 1/4] mmc: tmio, renesas-sdhi: add max_{segs,blk_count} to tmio_mmc_data

[Simon Horman]

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Allow TMIO and SDHI driver implementations to provide values for
max_segs and max_blk_count.

A follow-up patch will set these values for Renesas Gen3 SoCs
the using an SDHI driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
v2
* Enhanced changelog
* Include Renesas SDHI changes
---
 drivers/mmc/host/renesas_sdhi.h      | 2 ++
 drivers/mmc/host/renesas_sdhi_core.c | 2 ++
 drivers/mmc/host/tmio_mmc_core.c     | 6 +++---
 include/linux/mfd/tmio.h             | 2 ++
 4 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
index ca83acc113b8..b9dfea5d8193 100644
--- a/drivers/mmc/host/renesas_sdhi.h
+++ b/drivers/mmc/host/renesas_sdhi.h
@@ -31,6 +31,8 @@ struct renesas_sdhi_of_data {
 	int scc_offset;
 	struct renesas_sdhi_scc *taps;
 	int taps_num;
+	unsigned int max_blk_count;
+	unsigned short max_segs;
 };
 
 int renesas_sdhi_probe(struct platform_device *pdev,
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index a4fb07d0ea91..569bcdd5e653 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -526,6 +526,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 		mmc_data->capabilities |= of_data->capabilities;
 		mmc_data->capabilities2 |= of_data->capabilities2;
 		mmc_data->dma_rx_offset = of_data->dma_rx_offset;
+		mmc_data->max_blk_count = of_data->max_blk_count;
+		mmc_data->max_segs = of_data->max_segs;
 		dma_priv->dma_buswidth = of_data->dma_buswidth;
 		host->bus_shift = of_data->bus_shift;
 	}
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 82b80d42f7ae..95c93c227c65 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -1252,10 +1252,10 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
 
 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
 	mmc->caps2 |= pdata->capabilities2;
-	mmc->max_segs = 32;
+	mmc->max_segs = pdata->max_segs ? : 32;
 	mmc->max_blk_size = 512;
-	mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
-		mmc->max_segs;
+	mmc->max_blk_count = pdata->max_blk_count ? :
+		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
 	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
 	mmc->max_seg_size = mmc->max_req_size;
 
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 26e8f8c0a6db..18b17a39d465 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -128,6 +128,8 @@ struct tmio_mmc_data {
 	unsigned int			cd_gpio;
 	int				alignment_shift;
 	dma_addr_t			dma_rx_offset;
+	unsigned int			max_blk_count;
+	unsigned short			max_segs;
 	void (*set_pwr)(struct platform_device *host, int state);
 	void (*set_clk_div)(struct platform_device *host, int state);
 };
-- 
2.1.4

[PATCH mmc/next v3 2/4] mmc: tmio, renesas-sdhi: add dataend to DMA ops

[Simon Horman]

Add dataend to DMA ops to allow DMAC implementation dependent
handling of DMA data end.

Also implement the operation for SDHI.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v3
* s/complete/dataend/

v2
* Implement operation for SDHI to avoid regression
---
 drivers/mmc/host/renesas_sdhi_sys_dmac.c |  6 ++++++
 drivers/mmc/host/tmio_mmc.h              |  1 +
 drivers/mmc/host/tmio_mmc_core.c         | 10 ++++++++--
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index 642a0dcc8c5c..a125378417bf 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -126,6 +126,11 @@ static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
 	renesas_sdhi_sys_dmac_enable_dma(host, true);
 }
 
+static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
+{
+	complete(&host->dma_dataend);
+}
+
 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
 {
 	struct tmio_mmc_host *host = arg;
@@ -451,6 +456,7 @@ static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
 	.request = renesas_sdhi_sys_dmac_request_dma,
 	.release = renesas_sdhi_sys_dmac_release_dma,
 	.abort = renesas_sdhi_sys_dmac_abort_dma,
+	.dataend = renesas_sdhi_sys_dmac_dataend_dma,
 };
 
 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 6ad6704175dc..f2d747b036c7 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -122,6 +122,7 @@ struct tmio_mmc_dma_ops {
 			struct tmio_mmc_data *pdata);
 	void (*release)(struct tmio_mmc_host *host);
 	void (*abort)(struct tmio_mmc_host *host);
+	void (*dataend)(struct tmio_mmc_host *host);
 };
 
 struct tmio_mmc_host {
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 95c93c227c65..77e7b56a9099 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -87,6 +87,12 @@ static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
 		host->dma_ops->abort(host);
 }
 
+static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
+{
+	if (host->dma_ops)
+		host->dma_ops->dataend(host);
+}
+
 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
 {
 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
@@ -606,11 +612,11 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
 
 		if (done) {
 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
-			complete(&host->dma_dataend);
+			tmio_mmc_dataend_dma(host);
 		}
 	} else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
-		complete(&host->dma_dataend);
+		tmio_mmc_dataend_dma(host);
 	} else {
 		tmio_mmc_do_data_irq(host);
 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
-- 
2.1.4

[PATCH mmc/next v3 3/4] mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC

[Simon Horman]

Add a new variant of the SDHI driver to support R-Car Gen3 with DMA via
on-chip bus mastering.  Since the DMAC is in a part of the SDHI module it
is not suitable to be used via DMA Engine.

Clearing of DM_CM_INFO1 after DMA thanks to Dirk Behme

Cc: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v3
* Include <linux/io-64-nonatomic-hi-lo.h> for writeq() on 32-bit systems
* Enhance comment regarding need for custom accessor
* Do not add spurious log message
* Do not unnecessarily relock in renesas_sdhi_internal_dmac_dm_write()

v2
* Enhanced help text and changelog
---
 drivers/mmc/host/Kconfig                      |  19 ++
 drivers/mmc/host/Makefile                     |   8 +-
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 271 ++++++++++++++++++++++++++
 drivers/mmc/host/renesas_sdhi_sys_dmac.c      |   2 +-
 drivers/mmc/host/tmio_mmc.h                   |   1 +
 5 files changed, 299 insertions(+), 2 deletions(-)
 create mode 100644 drivers/mmc/host/renesas_sdhi_internal_dmac.c

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 5755b69f2f72..81c81ed19735 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -575,10 +575,29 @@ config MMC_SDHI
 	depends on SUPERH || ARM || ARM64
 	depends on SUPERH || ARCH_RENESAS || COMPILE_TEST
 	select MMC_TMIO_CORE
+	select MMC_SDHI_SYS_DMAC if (SUPERH || ARM)
+	select MMC_SDHI_INTERNAL_DMAC if ARM64
 	help
 	  This provides support for the SDHI SD/SDIO controller found in
 	  Renesas SuperH, ARM and ARM64 based SoCs
 
+config MMC_SDHI_SYS_DMAC
+	tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC"
+	depends on MMC_SDHI
+	help
+	  This provides DMA support for SDHI SD/SDIO controllers
+	  using SYS-DMAC via DMA Engine. This supports the controllers
+	  found in SuperH and Renesas ARM based SoCs.
+
+config MMC_SDHI_INTERNAL_DMAC
+	tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
+	depends on ARM64 || COMPILE_TEST
+	depends on MMC_SDHI
+	help
+	  This provides DMA support for SDHI SD/SDIO controllers
+	  using on-chip bus mastering. This supports the controllers
+	  found in arm64 based SoCs.
+
 config MMC_CB710
 	tristate "ENE CB710 MMC/SD Interface support"
 	depends on PCI
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 4d4547116311..8c46766c000c 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -36,7 +36,13 @@ obj-$(CONFIG_MMC_S3C)   	+= s3cmci.o
 obj-$(CONFIG_MMC_SDRICOH_CS)	+= sdricoh_cs.o
 obj-$(CONFIG_MMC_TMIO)		+= tmio_mmc.o
 obj-$(CONFIG_MMC_TMIO_CORE)	+= tmio_mmc_core.o
-obj-$(CONFIG_MMC_SDHI)		+= renesas_sdhi_core.o renesas_sdhi_sys_dmac.o
+obj-$(CONFIG_MMC_SDHI)		+= renesas_sdhi_core.o
+ifeq ($(subst m,y,$(CONFIG_MMC_SDHI_SYS_DMAC)),y)
+obj-$(CONFIG_MMC_SDHI)		+= renesas_sdhi_sys_dmac.o
+endif
+ifeq ($(subst m,y,$(CONFIG_MMC_SDHI_INTERNAL_DMAC)),y)
+obj-$(CONFIG_MMC_SDHI)		+= renesas_sdhi_internal_dmac.o
+endif
 obj-$(CONFIG_MMC_CB710)		+= cb710-mmc.o
 obj-$(CONFIG_MMC_VIA_SDMMC)	+= via-sdmmc.o
 obj-$(CONFIG_SDH_BFIN)		+= bfin_sdh.o
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
new file mode 100644
index 000000000000..a26c6ed8e029
--- /dev/null
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -0,0 +1,271 @@
+/*
+ * DMA support for Internal DMAC with SDHI SD/SDIO controller
+ *
+ * Copyright (C) 2016-17 Renesas Electronics Corporation
+ * Copyright (C) 2016-17 Horms Solutions, Simon Horman
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/io-64-nonatomic-hi-lo.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mmc/host.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/pagemap.h>
+#include <linux/scatterlist.h>
+
+#include "renesas_sdhi.h"
+#include "tmio_mmc.h"
+
+#define DM_CM_DTRAN_MODE	0x820
+#define DM_CM_DTRAN_CTRL	0x828
+#define DM_CM_RST		0x830
+#define DM_CM_INFO1		0x840
+#define DM_CM_INFO1_MASK	0x848
+#define DM_CM_INFO2		0x850
+#define DM_CM_INFO2_MASK	0x858
+#define DM_DTRAN_ADDR		0x880
+
+/* DM_CM_DTRAN_MODE */
+#define DTRAN_MODE_CH_NUM_CH0	0	/* "downstream" = for write commands */
+#define DTRAN_MODE_CH_NUM_CH1	BIT(16)	/* "uptream" = for read commands */
+#define DTRAN_MODE_BUS_WID_TH	(BIT(5) | BIT(4))
+#define DTRAN_MODE_ADDR_MODE	BIT(0)	/* 1 = Increment address */
+
+/* DM_CM_DTRAN_CTRL */
+#define DTRAN_CTRL_DM_START	BIT(0)
+
+/* DM_CM_RST */
+#define RST_DTRANRST1		BIT(9)
+#define RST_DTRANRST0		BIT(8)
+#define RST_RESERVED_BITS	GENMASK_ULL(32, 0)
+
+/* DM_CM_INFO1 and DM_CM_INFO1_MASK */
+#define INFO1_CLEAR		0
+#define INFO1_DTRANEND1		BIT(17)
+#define INFO1_DTRANEND0		BIT(16)
+
+/* DM_CM_INFO2 and DM_CM_INFO2_MASK */
+#define INFO2_DTRANERR1		BIT(17)
+#define INFO2_DTRANERR0		BIT(16)
+
+/*
+ * Specification of this driver:
+ * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma
+ * - Since this SDHI DMAC register set has 16 but 32-bit width, we
+ *   need a custom accessor.
+ */
+
+/* Definitions for sampling clocks */
+static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
+	{
+		.clk_rate = 0,
+		.tap = 0x00000300,
+	},
+};
+
+static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
+			  TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
+			  MMC_CAP_CMD23,
+	.bus_shift	= 2,
+	.scc_offset	= 0x1000,
+	.taps		= rcar_gen3_scc_taps,
+	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
+	/* Gen3 SDHI DMAC can handle 0xffffffff blk count, but seg = 1 */
+	.max_blk_count	= 0xffffffff,
+	.max_segs	= 1,
+};
+
+static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
+	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
+	{},
+};
+MODULE_DEVICE_TABLE(of, renesas_sdhi_internal_dmac_of_match);
+
+static void
+renesas_sdhi_internal_dmac_dm_write(struct tmio_mmc_host *host,
+				    int addr, u64 val)
+{
+	writeq(val, host->ctl + addr);
+}
+
+static void
+renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable)
+{
+	if (!host->chan_tx || !host->chan_rx)
+		return;
+
+	if (!enable)
+		renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1,
+						    INFO1_CLEAR);
+
+	if (host->dma->enable)
+		host->dma->enable(host, enable);
+}
+
+static void
+renesas_sdhi_internal_dmac_abort_dma(struct tmio_mmc_host *host) {
+	u64 val = RST_DTRANRST1 | RST_DTRANRST0;
+
+	renesas_sdhi_internal_dmac_enable_dma(host, false);
+
+	renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST,
+					    RST_RESERVED_BITS & ~val);
+	renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST,
+					    RST_RESERVED_BITS | val);
+
+	renesas_sdhi_internal_dmac_enable_dma(host, true);
+}
+
+static void
+renesas_sdhi_internal_dmac_dataend_dma(struct tmio_mmc_host *host) {
+	tasklet_schedule(&host->dma_complete);
+}
+
+static void
+renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
+				     struct mmc_data *data)
+{
+	struct scatterlist *sg = host->sg_ptr;
+	u32 dtran_mode = DTRAN_MODE_BUS_WID_TH | DTRAN_MODE_ADDR_MODE;
+	enum dma_data_direction dir;
+	int ret;
+	u32 irq_mask;
+
+	/* This DMAC cannot handle if sg_len is not 1 */
+	WARN_ON(host->sg_len > 1);
+
+	/* This DMAC cannot handle if buffer is not 8-bytes alignment */
+	if (!IS_ALIGNED(sg->offset, 8)) {
+		host->force_pio = true;
+		renesas_sdhi_internal_dmac_enable_dma(host, false);
+		return;
+	}
+
+	if (data->flags & MMC_DATA_READ) {
+		dtran_mode |= DTRAN_MODE_CH_NUM_CH1;
+		dir = DMA_FROM_DEVICE;
+		irq_mask = TMIO_STAT_RXRDY;
+	} else {
+		dtran_mode |= DTRAN_MODE_CH_NUM_CH0;
+		dir = DMA_TO_DEVICE;
+		irq_mask = TMIO_STAT_TXRQ;
+	}
+
+	ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir);
+	if (ret < 0)
+		return;
+
+	renesas_sdhi_internal_dmac_enable_dma(host, true);
+
+	/* disable PIO irqs to avoid "PIO IRQ in DMA mode!" */
+	tmio_mmc_disable_mmc_irqs(host, irq_mask);
+
+	/* set dma parameters */
+	renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_MODE,
+					    dtran_mode);
+	renesas_sdhi_internal_dmac_dm_write(host, DM_DTRAN_ADDR,
+					    sg->dma_address);
+}
+
+static void renesas_sdhi_internal_dmac_issue_tasklet_fn(unsigned long arg)
+{
+	struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
+
+	tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
+
+	/* start the DMAC */
+	renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_CTRL,
+					    DTRAN_CTRL_DM_START);
+}
+
+static void renesas_sdhi_internal_dmac_complete_tasklet_fn(unsigned long arg)
+{
+	struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
+	enum dma_data_direction dir;
+
+	spin_lock_irq(&host->lock);
+
+	if (!host->data)
+		goto out;
+
+	if (host->data->flags & MMC_DATA_READ)
+		dir = DMA_FROM_DEVICE;
+	else
+		dir = DMA_TO_DEVICE;
+
+	renesas_sdhi_internal_dmac_enable_dma(host, false);
+	dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir);
+
+	tmio_mmc_do_data_irq(host);
+out:
+	spin_unlock_irq(&host->lock);
+}
+
+static void
+renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host,
+				       struct tmio_mmc_data *pdata)
+{
+	/* Each value is set to non-zero to assume "enabling" each DMA */
+	host->chan_rx = host->chan_tx = (void *)0xdeadbeaf;
+
+	tasklet_init(&host->dma_complete,
+		     renesas_sdhi_internal_dmac_complete_tasklet_fn,
+		     (unsigned long)host);
+	tasklet_init(&host->dma_issue,
+		     renesas_sdhi_internal_dmac_issue_tasklet_fn,
+		     (unsigned long)host);
+}
+
+static void
+renesas_sdhi_internal_dmac_release_dma(struct tmio_mmc_host *host)
+{
+	/* Each value is set to zero to assume "disabling" each DMA */
+	host->chan_rx = host->chan_tx = NULL;
+}
+
+static struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = {
+	.start = renesas_sdhi_internal_dmac_start_dma,
+	.enable = renesas_sdhi_internal_dmac_enable_dma,
+	.request = renesas_sdhi_internal_dmac_request_dma,
+	.release = renesas_sdhi_internal_dmac_release_dma,
+	.abort = renesas_sdhi_internal_dmac_abort_dma,
+	.dataend = renesas_sdhi_internal_dmac_dataend_dma,
+};
+
+static int renesas_sdhi_internal_dmac_probe(struct platform_device *pdev)
+{
+	return renesas_sdhi_probe(pdev, &renesas_sdhi_internal_dmac_dma_ops);
+}
+
+static const struct dev_pm_ops renesas_sdhi_internal_dmac_dev_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
+	SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
+			   tmio_mmc_host_runtime_resume,
+			   NULL)
+};
+
+static struct platform_driver renesas_internal_dmac_sdhi_driver = {
+	.driver		= {
+		.name	= "renesas_sdhi_internal_dmac",
+		.pm	= &renesas_sdhi_internal_dmac_dev_pm_ops,
+		.of_match_table = renesas_sdhi_internal_dmac_of_match,
+	},
+	.probe		= renesas_sdhi_internal_dmac_probe,
+	.remove		= renesas_sdhi_remove,
+};
+
+module_platform_driver(renesas_internal_dmac_sdhi_driver);
+
+MODULE_DESCRIPTION("Renesas SDHI driver for internal DMAC");
+MODULE_AUTHOR("Yoshihiro Shimoda");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index a125378417bf..b6789f5197b3 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -1,5 +1,5 @@
 /*
- * DMA function for TMIO MMC implementations
+ * DMA support use of SYS DMAC with SDHI SD/SDIO controller
  *
  * Copyright (C) 2016-17 Renesas Electronics Corporation
  * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index f2d747b036c7..2479f8e12faf 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -152,6 +152,7 @@ struct tmio_mmc_host {
 	struct dma_chan		*chan_rx;
 	struct dma_chan		*chan_tx;
 	struct completion	dma_dataend;
+	struct tasklet_struct	dma_complete;
 	struct tasklet_struct	dma_issue;
 	struct scatterlist	bounce_sg;
 	u8			*bounce_buf;
-- 
2.1.4

[PATCH mmc/next v3 4/4] mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver

[Simon Horman]

Gen3 SoCs are now supported by the internal DMAC variant of the SDHI driver.
Remove them from the SYS-DMAC variant where only PIO mode is supported
for those SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
v2
* Revised changelog
---
 drivers/mmc/host/renesas_sdhi_sys_dmac.c | 21 ---------------------
 1 file changed, 21 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index b6789f5197b3..62feaacbf996 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -66,25 +66,6 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
 	.taps_num	= ARRAY_SIZE(rcar_gen2_scc_taps),
 };
 
-/* Definitions for sampling clocks */
-static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
-	{
-		.clk_rate = 0,
-		.tap = 0x00000300,
-	},
-};
-
-static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
-	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
-			  TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
-	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
-			  MMC_CAP_CMD23,
-	.bus_shift	= 2,
-	.scc_offset	= 0x1000,
-	.taps		= rcar_gen3_scc_taps,
-	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
-};
-
 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
 	{ .compatible = "renesas,sdhi-shmobile" },
 	{ .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
@@ -98,8 +79,6 @@ static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
 	{ .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
-	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
 	{},
 };
 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
-- 
2.1.4

Re: [PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 833 bytes --]


> this series adds support for the internal DMAC used by r8a779[56] SoCs.
> This is achieved by adding a new variant of the SDHI driver for this
> DMA controller with compat strings for the r8a779[56] SoCs.
> Compat strings for these SoCs are also removed from the existing SYS DMAC
> variant of the SDHI driver.

Okay, I tested some more today. My conclusion is that the series works
so far. However, it quite often triggers a SDR50 retune with one card.
And that sends an explicit CMD12 which we don't handle well. I always
suspected the code to be imperfect, now I have a proof. So, that is a
good thing but seems unrelated to this series to me.

Another card does not retune and works flawlessly.

I will sleep over it, re-test tomorrow and if my findings will get
confirmed, then I'll give my Reviewed-by tags to this series.


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH mmc/next v3 2/4] mmc: tmio, renesas-sdhi: add dataend to DMA ops

[Wolfram Sang]

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On Wed, Jun 21, 2017 at 04:00:28PM +0200, Simon Horman wrote:
> Add dataend to DMA ops to allow DMAC implementation dependent
> handling of DMA data end.
> 
> Also implement the operation for SDHI.
> 
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH mmc/next v3 3/4] mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC

[Wolfram Sang]

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On Wed, Jun 21, 2017 at 04:00:29PM +0200, Simon Horman wrote:
> Add a new variant of the SDHI driver to support R-Car Gen3 with DMA via
> on-chip bus mastering.  Since the DMAC is in a part of the SDHI module it
> is not suitable to be used via DMA Engine.
> 
> Clearing of DM_CM_INFO1 after DMA thanks to Dirk Behme
> 
> Cc: Dirk Behme <dirk.behme@de.bosch.com>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[Wolfram Sang]

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On Mon, Jun 26, 2017 at 10:16:50PM +0200, Wolfram Sang wrote:
> 
> > this series adds support for the internal DMAC used by r8a779[56] SoCs.
> > This is achieved by adding a new variant of the SDHI driver for this
> > DMA controller with compat strings for the r8a779[56] SoCs.
> > Compat strings for these SoCs are also removed from the existing SYS DMAC
> > variant of the SDHI driver.
> 
> Okay, I tested some more today. My conclusion is that the series works
> so far. However, it quite often triggers a SDR50 retune with one card.
> And that sends an explicit CMD12 which we don't handle well. I always
> suspected the code to be imperfect, now I have a proof. So, that is a
> good thing but seems unrelated to this series to me.
> 
> Another card does not retune and works flawlessly.
> 
> I will sleep over it, re-test tomorrow and if my findings will get
> confirmed, then I'll give my Reviewed-by tags to this series.

I could successfully move around big files on Lager/H2 and
Salvator-X/M3-W with multiple cards. The md5sum of the files matched.

The transfer speedups match Simon's numbers.

On M3-W, one card has problems because it wants to retune and that
causes problems independently of this DMA driver. M3-W works fine with
other cards. The card in question works fine with H2.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH mmc/next v3 4/4] mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver

[Simon Horman]

On Wed, Jun 21, 2017 at 04:00:30PM +0200, Simon Horman wrote:
> Gen3 SoCs are now supported by the internal DMAC variant of the SDHI driver.
> Remove them from the SYS-DMAC variant where only PIO mode is supported
> for those SoCs.
> 
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Hi,

I have become aware of some potential issues in this patch.
Please hold while I get a better view of things.

Re: [PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[Ulf Hansson]

On 21 June 2017 at 16:00, Simon Horman <horms+renesas@verge.net.au> wrote:
> Hi,
>
> this series adds support for the internal DMAC used by r8a779[56] SoCs.
> This is achieved by adding a new variant of the SDHI driver for this
> DMA controller with compat strings for the r8a779[56] SoCs.
> Compat strings for these SoCs are also removed from the existing SYS DMAC
> variant of the SDHI driver.
>
> Based on mmc/next
>
> Headline performance boost: 9.5MB/s -> 39.7MB/s
> Details below.
>
> Simon Horman (3):
>   mmc: tmio, renesas-sdhi: add dataend to DMA ops
>   mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC
>   mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver
>
> Yoshihiro Shimoda (1):
>   mmc: tmio, renesas-sdhi: add max_{segs,blk_count} to tmio_mmc_data
>
>  drivers/mmc/host/Kconfig                      |  19 ++
>  drivers/mmc/host/Makefile                     |   8 +-
>  drivers/mmc/host/renesas_sdhi.h               |   2 +
>  drivers/mmc/host/renesas_sdhi_core.c          |   2 +
>  drivers/mmc/host/renesas_sdhi_internal_dmac.c | 271 ++++++++++++++++++++++++++
>  drivers/mmc/host/renesas_sdhi_sys_dmac.c      |  29 +--
>  drivers/mmc/host/tmio_mmc.h                   |   2 +
>  drivers/mmc/host/tmio_mmc_core.c              |  16 +-
>  include/linux/mfd/tmio.h                      |   2 +
>  9 files changed, 323 insertions(+), 28 deletions(-)
>  create mode 100644 drivers/mmc/host/renesas_sdhi_internal_dmac.c

Thanks, applied patch 1->3 for next!

[...]

Kind regards
Uffe

Re: [PATCH mmc/next v3 0/4] mmc: renesas_sdhi: add support for R-Car Gen3 SDHI DMAC

[Simon Horman]

On Tue, Jul 11, 2017 at 04:43:00PM +0200, Ulf Hansson wrote:
> On 21 June 2017 at 16:00, Simon Horman <horms+renesas@verge.net.au> wrote:
> > Hi,
> >
> > this series adds support for the internal DMAC used by r8a779[56] SoCs.
> > This is achieved by adding a new variant of the SDHI driver for this
> > DMA controller with compat strings for the r8a779[56] SoCs.
> > Compat strings for these SoCs are also removed from the existing SYS DMAC
> > variant of the SDHI driver.
> >
> > Based on mmc/next
> >
> > Headline performance boost: 9.5MB/s -> 39.7MB/s
> > Details below.
> >
> > Simon Horman (3):
> >   mmc: tmio, renesas-sdhi: add dataend to DMA ops
> >   mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC
> >   mmc: renesas-sdhi: remove gen3 support from SYS-DMAC driver
> >
> > Yoshihiro Shimoda (1):
> >   mmc: tmio, renesas-sdhi: add max_{segs,blk_count} to tmio_mmc_data
> >
> >  drivers/mmc/host/Kconfig                      |  19 ++
> >  drivers/mmc/host/Makefile                     |   8 +-
> >  drivers/mmc/host/renesas_sdhi.h               |   2 +
> >  drivers/mmc/host/renesas_sdhi_core.c          |   2 +
> >  drivers/mmc/host/renesas_sdhi_internal_dmac.c | 271 ++++++++++++++++++++++++++
> >  drivers/mmc/host/renesas_sdhi_sys_dmac.c      |  29 +--
> >  drivers/mmc/host/tmio_mmc.h                   |   2 +
> >  drivers/mmc/host/tmio_mmc_core.c              |  16 +-
> >  include/linux/mfd/tmio.h                      |   2 +
> >  9 files changed, 323 insertions(+), 28 deletions(-)
> >  create mode 100644 drivers/mmc/host/renesas_sdhi_internal_dmac.c
> 
> Thanks, applied patch 1->3 for next!

Great, thanks.