From mboxrd@z Thu Jan  1 00:00:00 1970
From: Wolfram Sang <wsa@the-dreams.de>
Subject: Re: [PATCH v2] mmc: sdhi: use maximum width for the sdbuf register
Date: Thu, 10 Aug 2017 10:39:57 +0200
Message-ID: <20170810083957.GB2175@katana>
References: <20170809182926.669-1-wsa+renesas@sang-engineering.com>
 <20170810075309.GC16647@verge.net.au>
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To: Simon Horman <horms@verge.net.au>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>, linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das <biju.das@bp.renesas.com>
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On Thu, Aug 10, 2017 at 09:53:10AM +0200, Simon Horman wrote:
> On Wed, Aug 09, 2017 at 08:29:26PM +0200, Wolfram Sang wrote:
> > Make use of the 64 bit sdbuf width on Renesas R-Car Gen3. If the
> > registers are 8 byte apart, the width is also 64 bit. For all others,
> > the width is 32 bit, even if the registers are only 16 bit apart.
> >=20
> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
>=20
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Thanks!

> > Tested on a M3-W Salvator-X and H2 Lager (with both SDHI instances). On
> > the Lager, I could reproduce the problem with the old patch. It is gone=
 now!
>=20
> Do you think there is any value in widening the test-coverage of this
> change, f.e. to older SoCs?

Current mmc/next with this patch and the CBSY patch might be worth it,
I'd think. Mounting, copying and checksumming a file should do IMO.


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