From: "ernest.zhang" <ernest.zhang@bayhubtech.com>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: yuxiang.wan@bayhubtech.com, xiaoguang.yu@bayhubtech.com,
shirley.her@bayhubtech.com
Subject: [PATCH 2/3] mmc: sdhci: Add support for o2 eMMC HS200 mode and hardware tuning
Date: Thu, 28 Dec 2017 17:59:42 +0800 [thread overview]
Message-ID: <20171228095942.3994-1-ernest.zhang@bayhubtech.com> (raw)
Add register definition for eMMC HS200 mode. Add bitmask definition
for hardware tuning function.
Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com>
---
drivers/mmc/host/sdhci-pci-o2micro.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.h b/drivers/mmc/host/sdhci-pci-o2micro.h
index 770f53857211..5a4671d5a511 100644
--- a/drivers/mmc/host/sdhci-pci-o2micro.h
+++ b/drivers/mmc/host/sdhci-pci-o2micro.h
@@ -49,6 +49,7 @@
#define O2_SD_MISC_CTRL4 0xFC
#define O2_SD_TUNING_CTRL 0x300
#define O2_SD_PLL_SETTING 0x304
+#define O2_SD_MISC_SETTING 0x308
#define O2_SD_CLK_SETTING 0x328
#define O2_SD_CAP_REG2 0x330
#define O2_SD_CAP_REG0 0x334
@@ -62,6 +63,8 @@
#define O2_SD_FREG4_ENABLE_CLK_SET BIT(22)
#define O2_SD_VENDOR_SETTING 0x110
+#define O2_SD_HW_TUNING_ENABLE BIT(4)
+
#define O2_SD_VENDOR_SETTING2 0x1C8
extern int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot);
--
2.14.1
next reply other threads:[~2017-12-28 10:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-28 9:59 ernest.zhang [this message]
2018-01-09 12:36 ` [PATCH 2/3] mmc: sdhci: Add support for o2 eMMC HS200 mode and hardware tuning Adrian Hunter
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