[PATCH v10 1/3] dt-bindings: mmc: mtk-sd: extend interrupts and pinctrls properties

Axe Yang
2022-05-19T11:13:40Z

Extend interrupts and pinctrls for SDIO wakeup interrupt feature.
This feature allow SDIO devices alarm asynchronous interrupt to host
even when host stop providing clock to SDIO card. An extra wakeup
interrupt and pinctrl states for SDIO DAT1 pin state switching are
required in this scenario.

Signed-off-by: Axe Yang <axe.yang@mediatek.com>
---
.../devicetree/bindings/mmc/mtk-sd.yaml | 53 ++++++++++++++++++-
1 file changed, 52 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 2a2e9fa8c188..b068ab67a054 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -72,12 +72,26 @@ properties:
- const: ahb_cg

interrupts:
- maxItems: 1
+ description:
+ Should at least contain MSDC GIC interrupt. To support SDIO in-band wakeup, an extended
+ interrupt is required and be configured as wakeup source irq.
+ minItems: 1
+ maxItems: 2
+
+ interrupt-names:
+ items:
+ - const: msdc_irq

pinctrl-names:
+ description:
+ Should at least contain default and state_uhs. To support SDIO in-band wakeup, dat1 pin
+ will be switched between GPIO mode and SDIO DAT1 mode, state_eint and state_dat1 are
+ mandatory in this scenarios.
+ minItems: 2
items:
- const: default
- const: state_uhs
+ - const: state_eint

pinctrl-0:
description:
@@ -89,6 +103,11 @@ properties:
should contain uhs mode pin ctrl.
maxItems: 1

+ pinctrl-2:
+ description:
+ should switch dat1 pin to GPIO mode.
+ maxItems: 1
+
assigned-clocks:
description:
PLL of the source clock.
@@ -208,4 +227,36 @@ examples:
mediatek,hs400-cmd-resp-sel-rising;
};

+ mmc2: mmc@11250000 {
+ compatible = "mediatek,mt8195-mmc";
+ reg = <0x11250000 0x1000>,
+ <0x11e60000 0x1000>;
+ clock-names = "source", "hclk", "source_cg";
+ clocks = <&topckgen CLK_TOP_MSDC30_2_SEL>,
+ <&infracfg_ao CLK_INFRA_AO_MSDC2>,
+ <&infracfg_ao CLK_INFRA_AO_MSDC30_2>;
+ interrupt-names = "msdc_irq", "sdio_wakeup_irq";
+ interrupts = <&gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&pio 172 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default", "state_uhs", "state_eint";
+ pinctrl-0 = <&mmc2_pins_default>;
+ pinctrl-1 = <&mmc2_pins_uhs>;
+ pinctrl-2 = <&mmc2_pins_eint>;
+ assigned-clocks = <&topckgen CLK_TOP_MSDC30_2_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
+ bus-width = <4>;
+ max-frequency = <200000000>;
+ cap-sd-highspeed;
+ sd-uhs-sdr104;
+ keep-power-in-suspend;
+ wakeup-source;
+ cap-sdio-irq;
+ no-mmc;
+ no-sd;
+ non-removable;
+ vmmc-supply = <&sdio_fixed_3v3>;
+ vqmmc-supply = <&sdio_fixed_1v8>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ };
+
...
--
2.25.1