From: Krishna Yarlagadda <kyarlagadda@nvidia.com>
To: <linux-tegra@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <linux-i2c@vger.kernel.org>,
<linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<corbet@lwn.net>, <andi.shyti@kernel.org>,
<wsa+renesas@sang-engineering.com>, <ulf.hansson@linaro.org>,
<adrian.hunter@intel.com>, <digetx@gmail.com>,
<ldewangan@nvidia.com>, <kyarlagadda@nvidia.com>,
<mkumard@nvidia.com>
Subject: [RFC PATCH V2 04/12] dt-bindings: misc: tegra-i2c: config settings
Date: Mon, 1 Jul 2024 20:42:22 +0530 [thread overview]
Message-ID: <20240701151231.29425-5-kyarlagadda@nvidia.com> (raw)
In-Reply-To: <20240701151231.29425-1-kyarlagadda@nvidia.com>
I2C interface timing registers are configured using config setting
framework. List available field properties for Tegra I2C controllers.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
.../misc/nvidia,tegra-config-settings.yaml | 83 +++++++++++++++++--
1 file changed, 74 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml
index 4e5d52504c01..5f4da633e69b 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml
@@ -38,17 +38,74 @@ patternProperties:
additionalProperties: false
patternProperties:
- "^[a-z0-9_]+-cfg$":
- description:
- Config profiles applied conditionally.
+ "^i2c-[a-z0-9_]+-cfg$":
+ description: Config settings for I2C devices.
type: object
- patternProperties:
- "nvidia,[a-z0-9_]+$":
- description:
- Register field configuration.
- $ref: /schemas/types.yaml#/definitions/uint32
+ additionalProperties: false
-additionalProperties: true
+ properties:
+ nvidia,i2c-clk-divisor-hs-mode:
+ description: I2C clock divisor for HS mode.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-clk-divisor-fs-mode:
+ description: I2C clock divisor for FS mode.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-hs-sclk-high-period:
+ description: I2C high speed sclk high period.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-hs-sclk-low-period:
+ description: I2C high speed sclk low period.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-hs-stop-setup-time:
+ description: I2C high speed stop setup time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-hs-start-hold-time:
+ description: I2C high speed start hold time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-hs-start-setup-time:
+ description: I2C high speed start setup time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-sclk-high-period:
+ description: I2C sclk high period.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-sclk-low-period:
+ description: I2C sclk low period.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-bus-free-time:
+ description: I2C bus free time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-stop-setup-time:
+ description: I2C stop setup time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+ nvidia,i2c-start-hold-time:
+ description: I2C start hold time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 0xffff
+
+additionalProperties: false
examples:
- |
@@ -58,5 +115,13 @@ examples:
nvidia,i2c-hs-sclk-high-period = <0x03>;
nvidia,i2c-hs-sclk-low-period = <0x08>;
};
+ i2c-fast-cfg {
+ nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+ nvidia,i2c-sclk-high-period = <0x02>;
+ };
+ i2c-fastplus-cfg {
+ nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+ nvidia,i2c-sclk-high-period = <0x07>;
+ };
};
};
--
2.43.2
next prev parent reply other threads:[~2024-07-01 15:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 15:12 [RFC PATCH V2 00/12] Introduce Tegra register config settings Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 01/12] Documentation: Introduce config settings framework Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 02/12] dt-bindings: misc: Tegra configuration settings Krishna Yarlagadda
2024-07-01 16:58 ` Rob Herring (Arm)
2024-07-01 15:12 ` [RFC PATCH V2 03/12] soc: tegra: Add config setting framework Krishna Yarlagadda
2024-07-01 15:12 ` Krishna Yarlagadda [this message]
2024-07-01 16:58 ` [RFC PATCH V2 04/12] dt-bindings: misc: tegra-i2c: config settings Rob Herring (Arm)
2024-07-01 17:42 ` Rob Herring
2024-07-02 10:29 ` Thierry Reding
2024-07-03 20:21 ` Rob Herring
2024-07-05 10:51 ` Thierry Reding
2024-07-01 15:12 ` [RFC PATCH V2 05/12] dt-bindings: i2c: tegra-i2c: reference to config Krishna Yarlagadda
2024-07-01 16:58 ` Rob Herring (Arm)
2024-07-01 15:12 ` [RFC PATCH V2 06/12] i2c: tegra: split clock initialization code Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 07/12] i2c: tegra: config settings for interface timings Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 08/12] arm64: tegra: I2C " Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 09/12] dt-bindings: misc: tegra-sdhci: config settings Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 10/12] dt-bindings: mmc: tegra-sdhci: reference to config Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 11/12] mmc: host: tegra: config settings for timing Krishna Yarlagadda
2024-07-01 15:12 ` [RFC PATCH V2 12/12] arm64: tegra: SDHCI timing settings Krishna Yarlagadda
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