[PATCH v4 0/2] mmc: sdhci-pxav3: pinctrl setting for fast bus clocks

[PATCH v4 0/2] mmc: sdhci-pxav3: pinctrl setting for fast bus clocks

[Duje Mihanović]

Hello,

This small series adds a pinctrl setting for fast MMC bus clocks to the
pxav3 driver. On bus clocks above 100 MHz, driving the data pins at a
higher current helps maintain signal quality.

This series is related to Marvell PXA1908 SoC support merged into v6.17.

Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
Changes in v4:
- Address maintainer comments:
  - Fix if-else braces
- Rebase on v6.17-rc2
- Update trailers
- Link to v3: https://lore.kernel.org/r/20250806-pxav3-uhs-v3-0-2f03fee380b0@dujemihanovic.xyz

Changes in v3:
- Address maintainer comments:
  - Refactor driver patch
- Remove RFC tag
- Update trailers
- Link to v2: https://lore.kernel.org/r/20250801-pxav3-uhs-v2-0-afc1c428c776@dujemihanovic.xyz

Changes in v2:
- Address maintainer comments:
  - Newline between properties in if:
  - Don't try to lookup pinstates if pinctrl is NULL
  - Only change pinstates if both are valid
  - Replace dev_warn() with dev_dbg()
- Link to v1: https://lore.kernel.org/r/20250718-pxav3-uhs-v1-0-2e451256f1f6@dujemihanovic.xyz

---
Duje Mihanović (2):
      dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl
      mmc: sdhci-pxav3: add state_uhs pinctrl setting

 .../devicetree/bindings/mmc/sdhci-pxa.yaml         | 29 +++++++++++++--
 drivers/mmc/host/sdhci-pxav3.c                     | 41 +++++++++++++++++++++-
 2 files changed, 66 insertions(+), 4 deletions(-)
---
base-commit: c17b750b3ad9f45f2b6f7e6f7f4679844244f0b9
change-id: 20250718-pxav3-uhs-d956bfed13f0

Best regards,
-- 
Duje Mihanović <duje@dujemihanovic.xyz>

[PATCH v4 1/2] dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl

[Duje Mihanović]

On the pxav3 controller, increasing the drive strength of the data pins
might be required to maintain stability on fast bus clocks (above 100
MHz). Add a state_uhs pinctrl to allow this.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
Changes in v4:
- Rebase on v6.17-rc2 (That version has essentially had a part of this
  patch merged, causing the potentially weird diff. The end result is
  the same as in the previous versions of the series though.)

Changes in v2:
- Newlines between properties in if:
---
 .../devicetree/bindings/mmc/sdhci-pxa.yaml         | 29 +++++++++++++++++++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
index e7c06032048a3a73eb3eb67a887e75db273ffa92..fba1cc50fdf07cc25d42f45512c385a9b8207b9b 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml
@@ -44,12 +44,27 @@ allOf:
           items:
             - const: default
             - const: state_cmd_gpio
-        pinctrl-0:
-          description:
-            Should contain default pinctrl.
+
         pinctrl-1:
           description:
             Should switch CMD pin to GPIO mode as a high output.
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mrvl,pxav3-mmc
+    then:
+      properties:
+        pinctrl-names:
+          description:
+            Optional for increasing stability of the controller at fast bus clocks.
+          items:
+            - const: default
+            - const: state_uhs
+
+        pinctrl-1:
+          description:
+            Should switch the drive strength of the data pins to high.
 
 properties:
   compatible:
@@ -82,6 +97,14 @@ properties:
       - const: io
       - const: core
 
+  pinctrl-names: true
+
+  pinctrl-0:
+    description:
+      Should contain default pinctrl.
+
+  pinctrl-1: true
+
   mrvl,clk-delay-cycles:
     description: Specify a number of cycles to delay for tuning.
     $ref: /schemas/types.yaml#/definitions/uint32

-- 
2.50.1

[PATCH v4 2/2] mmc: sdhci-pxav3: add state_uhs pinctrl setting

[Duje Mihanović]

Different bus clocks require different pinctrl states to remain stable.
Add support for selecting between a default and UHS state according to
the bus clock.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
Changes in v4:
- Fix cosmetic issue
- Update trailers

Changes in v3:
- Move pinctrl stuff out of platdata
- Add helper for pinstate lookup
- Thanks to Adrian for the suggestions

Changes in v2:
- Don't attempt to lookup pinstates if getting pinctrl fails
- Only select pinstates if both of them are valid
- dev_warn() -> dev_dbg()
---
 drivers/mmc/host/sdhci-pxav3.c | 41 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 1371960e34ebbb955ba2334451ed4734041a7b1b..238f508f2fb0bd1194e42c77420d3748c952039e 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -20,9 +20,11 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
 #include <linux/mbus.h>
+#include <linux/units.h>
 
 #include "sdhci.h"
 #include "sdhci-pltfm.h"
@@ -51,6 +53,9 @@ struct sdhci_pxa {
 	struct clk *clk_io;
 	u8	power_mode;
 	void __iomem *sdio3_conf_reg;
+	struct pinctrl *pinctrl;
+	struct pinctrl_state *pins_default;
+	struct pinctrl_state *pins_uhs;
 };
 
 /*
@@ -313,8 +318,20 @@ static void pxav3_set_power(struct sdhci_host *host, unsigned char mode,
 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
 }
 
+static void pxav3_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct sdhci_pltfm_host *phost = sdhci_priv(host);
+	struct sdhci_pxa *pxa = sdhci_pltfm_priv(phost);
+	struct pinctrl_state *pins = clock < 100 * HZ_PER_MHZ ? pxa->pins_default : pxa->pins_uhs;
+
+	if (pins)
+		pinctrl_select_state(pxa->pinctrl, pins);
+
+	sdhci_set_clock(host, clock);
+}
+
 static const struct sdhci_ops pxav3_sdhci_ops = {
-	.set_clock = sdhci_set_clock,
+	.set_clock = pxav3_set_clock,
 	.set_power = pxav3_set_power,
 	.platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
 	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
@@ -366,6 +383,19 @@ static inline struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev)
 }
 #endif
 
+static struct pinctrl_state *pxav3_lookup_pinstate(struct device *dev, struct pinctrl *pinctrl,
+						   const char *name)
+{
+	struct pinctrl_state *pins = pinctrl_lookup_state(pinctrl, name);
+
+	if (IS_ERR(pins)) {
+		dev_dbg(dev, "could not get pinstate '%s': %ld\n", name, PTR_ERR(pins));
+		return NULL;
+	}
+
+	return pins;
+}
+
 static int sdhci_pxav3_probe(struct platform_device *pdev)
 {
 	struct sdhci_pltfm_host *pltfm_host;
@@ -440,6 +470,15 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
 			host->mmc->pm_caps |= pdata->pm_caps;
 	}
 
+	pxa->pinctrl = devm_pinctrl_get(dev);
+	if (!IS_ERR(pxa->pinctrl)) {
+		pxa->pins_default = pxav3_lookup_pinstate(dev, pxa->pinctrl, "default");
+		if (pxa->pins_default)
+			pxa->pins_uhs = pxav3_lookup_pinstate(dev, pxa->pinctrl, "state_uhs");
+	} else {
+		dev_dbg(dev, "could not get pinctrl handle: %ld\n", PTR_ERR(pxa->pinctrl));
+	}
+
 	pm_runtime_get_noresume(&pdev->dev);
 	pm_runtime_set_active(&pdev->dev);
 	pm_runtime_set_autosuspend_delay(&pdev->dev, PXAV3_RPM_DELAY_MS);

-- 
2.50.1

Re: [PATCH v4 0/2] mmc: sdhci-pxav3: pinctrl setting for fast bus clocks

[Ulf Hansson]

On Thu, 21 Aug 2025 at 13:20, Duje Mihanović <duje@dujemihanovic.xyz> wrote:
>
> Hello,
>
> This small series adds a pinctrl setting for fast MMC bus clocks to the
> pxav3 driver. On bus clocks above 100 MHz, driving the data pins at a
> higher current helps maintain signal quality.
>
> This series is related to Marvell PXA1908 SoC support merged into v6.17.
>
> Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>

Applied for next, thanks!

Kind regards
Uffe


> ---
> Changes in v4:
> - Address maintainer comments:
>   - Fix if-else braces
> - Rebase on v6.17-rc2
> - Update trailers
> - Link to v3: https://lore.kernel.org/r/20250806-pxav3-uhs-v3-0-2f03fee380b0@dujemihanovic.xyz
>
> Changes in v3:
> - Address maintainer comments:
>   - Refactor driver patch
> - Remove RFC tag
> - Update trailers
> - Link to v2: https://lore.kernel.org/r/20250801-pxav3-uhs-v2-0-afc1c428c776@dujemihanovic.xyz
>
> Changes in v2:
> - Address maintainer comments:
>   - Newline between properties in if:
>   - Don't try to lookup pinstates if pinctrl is NULL
>   - Only change pinstates if both are valid
>   - Replace dev_warn() with dev_dbg()
> - Link to v1: https://lore.kernel.org/r/20250718-pxav3-uhs-v1-0-2e451256f1f6@dujemihanovic.xyz
>
> ---
> Duje Mihanović (2):
>       dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl
>       mmc: sdhci-pxav3: add state_uhs pinctrl setting
>
>  .../devicetree/bindings/mmc/sdhci-pxa.yaml         | 29 +++++++++++++--
>  drivers/mmc/host/sdhci-pxav3.c                     | 41 +++++++++++++++++++++-
>  2 files changed, 66 insertions(+), 4 deletions(-)
> ---
> base-commit: c17b750b3ad9f45f2b6f7e6f7f4679844244f0b9
> change-id: 20250718-pxav3-uhs-d956bfed13f0
>
> Best regards,
> --
> Duje Mihanović <duje@dujemihanovic.xyz>
>