Re: [PATCH 01/10] dt-bindings: mmc: spacemit,sdhci: add AIB voltage switching registers

[Conor Dooley <conor@kernel.org>]

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On Mon, Mar 02, 2026 at 04:13:22PM +0100, Iker Pedrosa wrote:
> Add SpacemiT K1 AIB register properties for UHS voltage switching
> support:
> 
> - spacemit,aib-mmc1-io-reg: AIB MMC1 IO register address for voltage
>   switching
> - spacemit,apbc-asfar-reg: APBC ASFAR register address for AIB access
> - spacemit,apbc-assar-reg: APBC ASSAR register address for AIB access
> 
> These properties enable the driver to perform voltage switching between
> 3.3V and 1.8V required for UHS SD card modes.
> 
> Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
> ---
>  Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml
> index 13d9382058fbc1c12be1024d1c550f04a825673c..4d6590aa8262009b6e5697a04b45cf3736c0fa42 100644
> --- a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml
> @@ -32,6 +32,18 @@ properties:
>        - const: core
>        - const: io
>  
> +  spacemit,aib-mmc1-io-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: AIB MMC1 IO register address for voltage switching
> +
> +  spacemit,apbc-asfar-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: APBC ASFAR register address for AIB access
> +
> +  spacemit,apbc-assar-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: APBC ASSAR register address for AIB access
> +
>  required:
>    - compatible
>    - reg
> @@ -50,4 +62,7 @@ examples:
>        interrupt-parent = <&plic>;
>        clocks = <&clk_apmu 10>, <&clk_apmu 13>;
>        clock-names = "core", "io";
> +      spacemit,aib-mmc1-io-reg = <0xd401e81c>;

This looks very very wrong to me. This is part of the pinctrl
reservation:
		pinctrl: pinctrl@d401e000 {
			compatible = "spacemit,k1-pinctrl";
			reg = <0x0 0xd401e000 0x0 0x1000>;
			clocks = <&syscon_apbc CLK_AIB>,
				 <&syscon_apbc CLK_AIB_BUS>;
			clock-names = "func", "bus";
			spacemit,apbc = <&syscon_apbc>;
		};
so if you need to change something here, you need to do it via pinctrl.

> +      spacemit,apbc-asfar-reg = <0xd4015050>;
> +      spacemit,apbc-assar-reg = <0xd4015054>;

These two are the apbc syscon:
		syscon_apbc: system-controller@d4015000 {
			compatible = "spacemit,k1-syscon-apbc";
			reg = <0x0 0xd4015000 0x0 0x1000>;
			clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
				 <&vctcxo_24m>;
			clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
				      "vctcxo_24m";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};
so add a phandle to the syscon (like the pinctrl currently has) and
access these via its regmap. What you've got here is a non-runner,
sorry.
pw-bot: changes-requested

Thanks,
Conor.

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