From: "Huan He" <hehuan1@eswincomputing.com>
To: "Krzysztof Kozlowski" <krzk@kernel.org>
Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
ningyu@eswincomputing.com, linmin@eswincomputing.com,
pinkesh.vaghela@einfochips.com, xuxiang@eswincomputing.com
Subject: Re: Re: [PATCH v1] mmc: sdhci-of-dwcmshc: fix init for AXI clock and DMA 128MB boundary
Date: Fri, 9 Jan 2026 16:35:10 +0800 (GMT+08:00) [thread overview]
Message-ID: <3684f310.2189.19ba1e52e5f.Coremail.hehuan1@eswincomputing.com> (raw)
In-Reply-To: <4ae22253-455e-44ef-8774-47dfae3c4674@kernel.org>
> >
> > 1.Accessing the High-Speed registers requires the AXI clock to be enabled.
> > 2.This DWC MSHC has a 128MB limitation where the data buffer size and
> > start address must not exceed the 128MB boundary. Registering the
> > missing 'adma_write_desc' callback function.
> >
> > Signed-off-by: Huan He <hehuan1@eswincomputing.com>
> > ---
> > drivers/mmc/host/sdhci-of-dwcmshc.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 51949cde0958..147f8046707f 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -1588,6 +1588,7 @@ static int eic7700_init(struct device *dev, struct sdhci_host *host, struct dwcm
> > {
> > u32 emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO;
> > unsigned int val, hsp_int_status, hsp_pwr_ctrl;
> > + static const char * const clk_ids[] = {"axi"};
> > struct of_phandle_args args;
> > struct eic7700_priv *priv;
> > struct regmap *hsp_regmap;
> > @@ -1605,6 +1606,11 @@ static int eic7700_init(struct device *dev, struct sdhci_host *host, struct dwcm
> > return ret;
> > }
> >
> > + ret = dwcmshc_get_enable_other_clks(mmc_dev(host->mmc), dwc_priv,
> > + ARRAY_SIZE(clk_ids), clk_ids);
>
> Is this clock (ABI) already documented?
Yes, this clock (AXI clock) is already documented in the Device Tree
binding specification.
In the snps,dwcmshc-sdhci.yaml binding document, the AXI clock is included
in the clock definitions:
properties:
clocks:
minItems: 1
items:
- description: core clock
- description: bus clock for optional
- description: axi clock for rockchip specified
- description: block clock for rockchip specified
- description: timer clock for rockchip specified
clock-names:
minItems: 1
items:
- const: core
- const: bus
- const: axi
- const: block
- const: timer
Best regards,
Huan He
prev parent reply other threads:[~2026-01-09 8:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 3:28 [PATCH v1] mmc: sdhci-of-dwcmshc: fix init for AXI clock and DMA 128MB boundary hehuan1
2026-01-09 7:03 ` Shawn Lin
2026-01-09 7:36 ` Krzysztof Kozlowski
2026-01-09 8:35 ` Huan He [this message]
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