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([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id w8-20020a056830410800b00605b48122eesm53063ott.14.2022.04.24.08.28.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 24 Apr 2022 08:28:23 -0700 (PDT) Sender: Guenter Roeck Message-ID: <3df135a2-17f5-d6c6-b4a8-e1a60e254297@roeck-us.net> Date: Sun, 24 Apr 2022 08:28:19 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Content-Language: en-US To: Arnd Bergmann Cc: Robert Jarzmik , Linux ARM , Arnd Bergmann , Daniel Mack , Haojian Zhuang , Marek Vasut , Philipp Zabel , Lubomir Rintel , Paul Parsons , Tomas Cech , Sergey Lapin , Thomas Bogendoerfer , Michael Turquette , Stephen Boyd , "Rafael J. Wysocki" , Viresh Kumar , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Helge Deller , Mark Brown , Linus Walleij , Linux Kernel Mailing List , "open list:BROADCOM NVRAM DRIVER" , IDE-ML , linux-clk , Linux PM list , "open list:HID CORE LAYER" , patches@opensource.cirrus.com, linux-leds@vger.kernel.org, linux-mmc , linux-mtd , linux-rtc@vger.kernel.org, USB list , Linux Fbdev development list , dri-devel , ALSA Development Mailing List References: <20220419163810.2118169-1-arnd@kernel.org> <20220422170530.GA2338209@roeck-us.net> <8b36d3a4-ec85-2f9f-e4b7-734d8ddd3d8f@roeck-us.net> <20220422234150.GA3442771@roeck-us.net> <3b4046ed-fd75-13ea-fac3-06469172806c@roeck-us.net> From: Guenter Roeck Subject: Re: [PATCH v2 00/48] ARM: PXA multiplatform support In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org On 4/24/22 01:52, Arnd Bergmann wrote: > On Sun, Apr 24, 2022 at 4:09 AM Guenter Roeck wrote: >> On 4/23/22 12:55, Arnd Bergmann wrote: >>> On Sat, Apr 23, 2022 at 1:41 AM Guenter Roeck wrote: >>>> On Sat, Apr 23, 2022 at 12:04:31AM +0200, Arnd Bergmann wrote: >>> >>> Odd, I can't reproduce this at all. Do you get any console output at >>> all for this? >>> >>> Is this the plain omap1_defconfig, or something else? >>> >> >> No, it is my own sx1 specific configuration. >> >> https://github.com/groeck/linux-build-test/blob/master/rootfs/arm/qemu_sx1_defconfig >> >> I don't recall where I got it from but ... > > Ok, that explains it, thanks! > > I fixed all the defconfig files that come with the kernel, but for your own > ones you have to add > > # CONFIG_ARCH_MULTI_V7 is not set > > into the defconfig file, otherwise the multiplatform target defaults to > an ARMv7 instead of ARMv5 build. For an OMAP15xx as in the SX1, > you also need to enable CONFIG_ARCH_MULTI_V4T. > > This is slightly unfortunate, but I don't see any way to avoid it, and the > modified defconfig will still work fine with older kernel trees. > Yes, that works. I changed it in my configuration. >>> One thing I keep having to apply myself is this snippet: >>> >>> diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S >>> index 0bfad62ea858..87c695703580 100644 >>> --- a/arch/arm/mm/proc-arm925.S >>> +++ b/arch/arm/mm/proc-arm925.S >>> @@ -441,7 +441,6 @@ __arm925_setup: >>> >>> #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH >>> mov r0, #4 @ disable write-back >>> on caches explicitly >>> - mcr p15, 7, r0, c15, c0, 0 >>> #endif >> >> it does not have CONFIG_CPU_DCACHE_WRITETHROUGH enabled. > > Maybe it was disabled explicitly for the sx1_defconfig because of this > bug. I would think that this is required for actual sx1 hardware because the > option is default-enabled for ARM925T, and that CPU core is exclusively > used in OMAP15xx. > That looks like a bug in qemu. ARM925T instruction support is limited to V4T instructions. qemu doesn't have explicit 5T support. It is either V4T or V5. Guenter