Re: MMC_CAP_SDIO_IRQ for omap 3430

Dirk Behme
2009-10-19T14:52:26Z

Woodruff, Richard wrote:
>> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
>> owner@vger.kernel.org] On Behalf Of Dirk Behme
>> Sent: Sunday, October 18, 2009 11:45 AM
>
>>> It would be funny if the TRM was wrong and the CIRQ bit is really
>>> cleared by writing 1 to it. I'll try that.
>
> A while back I hunted down a few of the bits for this. Maybe this will help some.
>
> SYSCONFIG.ENAWAKEUP = 1 < allow ocp wrapper to generate an interrupt to prcm>
> MMCHS_HCTL.IWE = 1 < route wake up to module ocp wrapper>
> MMCHS_CON.CPTL = 1 < Don't disable input buffer on DAT1 after completion to allow seeing SDIO interrupt>
> MMCHS_HCTL.IWE
> MMCHS_ISE.CIRQ_ENABLE <bit to write to enable interrupt at pin>
> MMCHS_STAT<bit to write for clear of SDIO interrupt>
> CCCCR - IRQ_ENABLE (think host stack will do this)

Thanks!

Do you have any idea about MMCHS_HCTL.IBG?

<This bit is valid only in 4-bit mode of SDIO card to enable interrupt
detection in the interrupt cycle at block gap for a multiple block
transfer.
For MMC cards and for SD card this bit should be set to 0.
0x0: Disable interrupt detection at the block gap in 4-bit mode
0x1: Enable interrupt detection at the block gap in 4-bit mode>

I saw it neither in the exiting code I looked at, nor in your
description above. But it sounds to me that it should be set for 4-bit
mode?

Best regards

Dirk