Re: [PATCH] sdhci: adjust sd 3.0 host controller spec clock divider

Philip Rakity
2010-10-05T23:31:26Z

>
>On 5-10-2010 10:34, Chris Ball wrote:
>> Hi David,
>>
>> On Thu, Sep 30, 2010 at 08:03:14PM -0700, Philip Rakity wrote:
>>> From: Philip Rakity <prakity@marvell.com>
>>> Date: Thu, 30 Sep 2010 15:34:24 -0700
>>> Subject: [PATCH] sdhci: adjust sd 3.0 host controller spec clock divider
>>>
>>> The sd 3.0 host spec does not require the clock divider to be a power of 2.
>
>The text and code for sd 3.0 was talking about a multiple of 2, not a power of 2
>
>>> Signed-off-by: Philip Rakity <prakity@marvell.com>
>>> ---
>>> drivers/mmc/host/sdhci.c | 8 +++-----
>>> 1 files changed, 3 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
>>> index 96c7f60..73a94fe 100644
>>> --- a/drivers/mmc/host/sdhci.c
>>> +++ b/drivers/mmc/host/sdhci.c
>>> @@ -1003,14 +1003,12 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>>> goto out;
>>>
>>> if (host->version >= SDHCI_SPEC_300) {
>>> - /* Version 3.00 divisors must be a multiple of 2. */
>>> if (host->max_clk <= clock)
>>> div = 1;
>>> else {
>>> - for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
>>> - if ((host->max_clk / div) <= clock)
>>> - break;
>>> - }
>>> + div = host->max_clk/clock;
>>> + if (host->max_clk % clock)
>>> + div++;
>If you mean to divide and round up, wouldn't :
>
>+ div = DIV_ROUND_UP (host->max_clk, clock);
>
>be nicer and cheaper?
nicer -- yes
cheaper -- code is executed normally to set the clock for f_min and then for max frequency.

>
>Can SDHCI_MAX_DIV_SPEC_300 be dropped safely?
I believe so -- code should not be called from mmc layerwith speed lower then f_min nor more then f_max

>
>(don't have access to the sd 3.0 specs neither)
>
>Hein
>