From: Jaehoon Chung <jh80.chung@samsung.com>
To: Chris Ball <cjb@laptop.org>
Cc: "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
Will Newton <will.newton@gmail.com>,
Kyungmin Park <kyungmin.park@samsung.com>
Subject: Re: [PATCH] dw_mmc: modify quirks bit-shift control
Date: Thu, 17 Feb 2011 13:09:04 +0900 [thread overview]
Message-ID: <4D5C9F60.9020306@samsung.com> (raw)
In-Reply-To: <20110216194232.GA17634@void.printf.net>
Hi..
> Why skip (1 << 1)? (There's also BIT(0) -> BIT(2) if you prefer.)
My mistake..sorry..and thanks for your comment..
I resend the patch applied BIT(0)-BIT(2)
Thanks,
Jaehoon Chung
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
include/linux/mmc/dw_mmc.h | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 16b0261..3f22c20 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -165,14 +165,12 @@ struct dw_mci_dma_ops {
};
/* IP Quirks/flags. */
-/* No special quirks or flags to cater for */
-#define DW_MCI_QUIRK_NONE 0
/* DTO fix for command transmission with IDMAC configured */
-#define DW_MCI_QUIRK_IDMAC_DTO 1
+#define DW_MCI_QUIRK_IDMAC_DTO BIT(0)
/* delay needed between retries on some 2.11a implementations */
-#define DW_MCI_QUIRK_RETRY_DELAY 2
+#define DW_MCI_QUIRK_RETRY_DELAY BIT(1)
/* High Speed Capable - Supports HS cards (upto 50MHz) */
-#define DW_MCI_QUIRK_HIGHSPEED 4
+#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
struct dma_pdata;
--
1.6.0.4
next prev parent reply other threads:[~2011-02-17 4:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-16 6:19 [PATCH] dw_mmc: modify quirks bit-shift control Jaehoon Chung
2011-02-16 9:58 ` Will Newton
2011-02-16 19:42 ` Chris Ball
2011-02-17 4:09 ` Jaehoon Chung [this message]
2011-02-17 4:13 ` Chris Ball
2011-02-17 10:05 ` Will Newton
2011-02-17 15:39 ` Chris Ball
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