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Fri, 10 Oct 2025 02:35:47 -0700 (PDT) Message-ID: <4cd8b624-3830-4989-b287-01e689cdb3df@tuxon.dev> Date: Fri, 10 Oct 2025 12:35:45 +0300 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] mmc: renesas_sdhi: Deassert the reset signal on probe To: Geert Uytterhoeven Cc: wsa+renesas@sang-engineering.com, ulf.hansson@linaro.org, p.zabel@pengutronix.de, linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea References: <20251008042526.3312597-1-claudiu.beznea.uj@bp.renesas.com> <20251008042526.3312597-2-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Geert, On 10/10/25 10:51, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Fri, 10 Oct 2025 at 07:06, Claudiu wrote: >> From: Claudiu Beznea >> >> Deassert the reset signal of the SDHI controller during probe to avoid >> relying on the previous bootloaders. Without deasserting the reset signal, >> the SDHI controller will not function. >> >> Signed-off-by: Claudiu Beznea > > Thanks for your patch! > >> --- a/drivers/mmc/host/renesas_sdhi_core.c >> +++ b/drivers/mmc/host/renesas_sdhi_core.c >> @@ -1103,7 +1103,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, >> if (IS_ERR(priv->clk_cd)) >> return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk_cd), "cannot get cd clock"); >> >> - priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); >> + priv->rstc = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, NULL); > > Note that this has the side effect of asserting reset again on probe > failure or unbind. I agree. I've tested unbind/bind on RZ/G3S and I saw no issue. > Also on SoCs that boot with reset already deasserted > (e.g. R-Car). I don't know if that would be a problem. I think all SoCs boot with resets de-asserted as the driver does register configuration before calling reset_control_reset() in renesas_sdhi_reset(), e.g: - one register configuration is just above reset_control_reset() - one register configuration, through sd_ctrl_write32_as_16_and_16(), in renesas_sdhi_probe() - register writes in tmio_mmc_reset() before host->reset() call I did bonnie++ tests after boot on RZ/G2{H, M, N, L, UL}, RZ/V2L and saw no issue. Thank you for your review, Claudiu > >> if (IS_ERR(priv->rstc)) >> return PTR_ERR(priv->rstc); > > Gr{oetje,eeting}s, > > Geert >