* [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write
@ 2013-01-15 15:36 Shawn Guo
2013-01-15 15:36 ` [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix Shawn Guo
2013-01-25 6:46 ` [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Dirk Behme
0 siblings, 2 replies; 4+ messages in thread
From: Shawn Guo @ 2013-01-15 15:36 UTC (permalink / raw)
To: linux-mmc; +Cc: Chris Ball, Shawn Guo
SDHCI_CTRL_D3CD is not a standard SDHCI_HOST_CONTROL, so there is no
need to check it in SDHCI_HOST_CONTROL write at all. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index ac6f971..322eabf 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -297,10 +297,8 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
*/
return;
case SDHCI_HOST_CONTROL:
- /* FSL messed up here, so we can just keep those three */
- new_val = val & (SDHCI_CTRL_LED | \
- SDHCI_CTRL_4BITBUS | \
- SDHCI_CTRL_D3CD);
+ /* FSL messed up here, so we need to manually compose it. */
+ new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
/* ensure the endianness */
new_val |= ESDHC_HOST_CONTROL_LE;
/* bits 8&9 are reserved on mx25 */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix
2013-01-15 15:36 [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Shawn Guo
@ 2013-01-15 15:36 ` Shawn Guo
2013-01-25 6:46 ` Dirk Behme
2013-01-25 6:46 ` [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Dirk Behme
1 sibling, 1 reply; 4+ messages in thread
From: Shawn Guo @ 2013-01-15 15:36 UTC (permalink / raw)
To: linux-mmc; +Cc: Chris Ball, Shawn Guo
Rename esdhc local definitions with ESDHC_ rather than SDHCI_ prefix,
so that we can distinguish them from SDHCI core definitions from name.
A couple of bit fields are also changed use shift for consistency and
better readability.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 40 ++++++++++++++++++------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 322eabf..6ffd15e 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -30,12 +30,12 @@
#include "sdhci-pltfm.h"
#include "sdhci-esdhc.h"
-#define SDHCI_CTRL_D3CD 0x08
+#define ESDHC_CTRL_D3CD 0x08
/* VENDOR SPEC register */
-#define SDHCI_VENDOR_SPEC 0xC0
-#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
-#define SDHCI_WTMK_LVL 0x44
-#define SDHCI_MIX_CTRL 0x48
+#define ESDHC_VENDOR_SPEC 0xc0
+#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1)
+#define ESDHC_WTMK_LVL 0x44
+#define ESDHC_MIX_CTRL 0x48
/*
* There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
@@ -43,7 +43,7 @@
* but bit28 is used as the INT DMA ERR in fsl eSDHC design.
* Define this macro DMA error INT for fsl eSDHC
*/
-#define SDHCI_INT_VENDOR_SPEC_DMA_ERR 0x10000000
+#define ESDHC_INT_VENDOR_SPEC_DMA_ERR (1 << 28)
/*
* The CMDTYPE of the CMD register (offset 0xE) should be set to
@@ -165,8 +165,8 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
}
if (unlikely(reg == SDHCI_INT_STATUS)) {
- if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) {
- val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR;
+ if (val & ESDHC_INT_VENDOR_SPEC_DMA_ERR) {
+ val &= ~ESDHC_INT_VENDOR_SPEC_DMA_ERR;
val |= SDHCI_INT_ADMA_ERROR;
}
}
@@ -192,9 +192,9 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
* re-sample it by the following steps.
*/
data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
- data &= ~SDHCI_CTRL_D3CD;
+ data &= ~ESDHC_CTRL_D3CD;
writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
- data |= SDHCI_CTRL_D3CD;
+ data |= ESDHC_CTRL_D3CD;
writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
}
}
@@ -203,15 +203,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
&& (reg == SDHCI_INT_STATUS)
&& (val & SDHCI_INT_DATA_END))) {
u32 v;
- v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
- v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
- writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
+ v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
+ v &= ~ESDHC_VENDOR_SPEC_SDIO_QUIRK;
+ writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
}
if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
if (val & SDHCI_INT_ADMA_ERROR) {
val &= ~SDHCI_INT_ADMA_ERROR;
- val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR;
+ val |= ESDHC_INT_VENDOR_SPEC_DMA_ERR;
}
}
@@ -253,9 +253,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
&& (host->cmd->data->blocks > 1)
&& (host->cmd->data->flags & MMC_DATA_READ)) {
u32 v;
- v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
- v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
- writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
+ v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
+ v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
+ writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
}
imx_data->scratchpad = val;
return;
@@ -266,9 +266,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
val |= SDHCI_CMD_ABORTCMD;
if (is_imx6q_usdhc(imx_data)) {
- u32 m = readl(host->ioaddr + SDHCI_MIX_CTRL);
+ u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
m = imx_data->scratchpad | (m & 0xffff0000);
- writel(m, host->ioaddr + SDHCI_MIX_CTRL);
+ writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel(val << 16,
host->ioaddr + SDHCI_TRANSFER_MODE);
} else {
@@ -487,7 +487,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
* to something insane. Change it back here.
*/
if (is_imx6q_usdhc(imx_data))
- writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL);
+ writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
boarddata = &imx_data->boarddata;
if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write
2013-01-15 15:36 [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Shawn Guo
2013-01-15 15:36 ` [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix Shawn Guo
@ 2013-01-25 6:46 ` Dirk Behme
1 sibling, 0 replies; 4+ messages in thread
From: Dirk Behme @ 2013-01-25 6:46 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-mmc@vger.kernel.org, Chris Ball
On 15.01.2013 16:36, Shawn Guo wrote:
> SDHCI_CTRL_D3CD is not a standard SDHCI_HOST_CONTROL, so there is no
> need to check it in SDHCI_HOST_CONTROL write at all. Remove it.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Tested on i.MX6.
Thanks
Dirk
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index ac6f971..322eabf 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -297,10 +297,8 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
> */
> return;
> case SDHCI_HOST_CONTROL:
> - /* FSL messed up here, so we can just keep those three */
> - new_val = val & (SDHCI_CTRL_LED | \
> - SDHCI_CTRL_4BITBUS | \
> - SDHCI_CTRL_D3CD);
> + /* FSL messed up here, so we need to manually compose it. */
> + new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
> /* ensure the endianness */
> new_val |= ESDHC_HOST_CONTROL_LE;
> /* bits 8&9 are reserved on mx25 */
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix
2013-01-15 15:36 ` [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix Shawn Guo
@ 2013-01-25 6:46 ` Dirk Behme
0 siblings, 0 replies; 4+ messages in thread
From: Dirk Behme @ 2013-01-25 6:46 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-mmc@vger.kernel.org, Chris Ball
On 15.01.2013 16:36, Shawn Guo wrote:
> Rename esdhc local definitions with ESDHC_ rather than SDHCI_ prefix,
> so that we can distinguish them from SDHCI core definitions from name.
>
> A couple of bit fields are also changed use shift for consistency and
> better readability.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Tested on i.MX6.
Thanks
Dirk
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 40 ++++++++++++++++++------------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 322eabf..6ffd15e 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -30,12 +30,12 @@
> #include "sdhci-pltfm.h"
> #include "sdhci-esdhc.h"
>
> -#define SDHCI_CTRL_D3CD 0x08
> +#define ESDHC_CTRL_D3CD 0x08
> /* VENDOR SPEC register */
> -#define SDHCI_VENDOR_SPEC 0xC0
> -#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
> -#define SDHCI_WTMK_LVL 0x44
> -#define SDHCI_MIX_CTRL 0x48
> +#define ESDHC_VENDOR_SPEC 0xc0
> +#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1)
> +#define ESDHC_WTMK_LVL 0x44
> +#define ESDHC_MIX_CTRL 0x48
>
> /*
> * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
> @@ -43,7 +43,7 @@
> * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
> * Define this macro DMA error INT for fsl eSDHC
> */
> -#define SDHCI_INT_VENDOR_SPEC_DMA_ERR 0x10000000
> +#define ESDHC_INT_VENDOR_SPEC_DMA_ERR (1 << 28)
>
> /*
> * The CMDTYPE of the CMD register (offset 0xE) should be set to
> @@ -165,8 +165,8 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
> }
>
> if (unlikely(reg == SDHCI_INT_STATUS)) {
> - if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) {
> - val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR;
> + if (val & ESDHC_INT_VENDOR_SPEC_DMA_ERR) {
> + val &= ~ESDHC_INT_VENDOR_SPEC_DMA_ERR;
> val |= SDHCI_INT_ADMA_ERROR;
> }
> }
> @@ -192,9 +192,9 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
> * re-sample it by the following steps.
> */
> data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
> - data &= ~SDHCI_CTRL_D3CD;
> + data &= ~ESDHC_CTRL_D3CD;
> writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
> - data |= SDHCI_CTRL_D3CD;
> + data |= ESDHC_CTRL_D3CD;
> writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
> }
> }
> @@ -203,15 +203,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
> && (reg == SDHCI_INT_STATUS)
> && (val & SDHCI_INT_DATA_END))) {
> u32 v;
> - v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
> - v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
> - writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
> + v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
> + v &= ~ESDHC_VENDOR_SPEC_SDIO_QUIRK;
> + writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
> }
>
> if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
> if (val & SDHCI_INT_ADMA_ERROR) {
> val &= ~SDHCI_INT_ADMA_ERROR;
> - val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR;
> + val |= ESDHC_INT_VENDOR_SPEC_DMA_ERR;
> }
> }
>
> @@ -253,9 +253,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
> && (host->cmd->data->blocks > 1)
> && (host->cmd->data->flags & MMC_DATA_READ)) {
> u32 v;
> - v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
> - v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
> - writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
> + v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
> + v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
> + writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
> }
> imx_data->scratchpad = val;
> return;
> @@ -266,9 +266,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
> val |= SDHCI_CMD_ABORTCMD;
>
> if (is_imx6q_usdhc(imx_data)) {
> - u32 m = readl(host->ioaddr + SDHCI_MIX_CTRL);
> + u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
> m = imx_data->scratchpad | (m & 0xffff0000);
> - writel(m, host->ioaddr + SDHCI_MIX_CTRL);
> + writel(m, host->ioaddr + ESDHC_MIX_CTRL);
> writel(val << 16,
> host->ioaddr + SDHCI_TRANSFER_MODE);
> } else {
> @@ -487,7 +487,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
> * to something insane. Change it back here.
> */
> if (is_imx6q_usdhc(imx_data))
> - writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL);
> + writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
>
> boarddata = &imx_data->boarddata;
> if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2013-01-25 7:00 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-01-15 15:36 [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Shawn Guo
2013-01-15 15:36 ` [PATCH 2/2] mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix Shawn Guo
2013-01-25 6:46 ` Dirk Behme
2013-01-25 6:46 ` [PATCH 1/2] mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL write Dirk Behme
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