From mboxrd@z Thu Jan 1 00:00:00 1970 From: wwang Subject: Re: [PATCH] mfd:rtsx: Support RTS5249 Date: Mon, 25 Mar 2013 14:23:45 +0800 Message-ID: <514FED71.8020307@realsil.com.cn> References: <1364177636-4294-1-git-send-email-wei_wang@realsil.com.cn> <20130325060038.GD9138@mwanda> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from rtits2.realtek.com ([60.250.210.242]:34625 "EHLO rtits2.realtek.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757822Ab3CYGYG (ORCPT ); Mon, 25 Mar 2013 02:24:06 -0400 In-Reply-To: <20130325060038.GD9138@mwanda> Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: Dan Carpenter Cc: cjb@laptop.org, sameo@linux.intel.com, gregkh@linuxfoundation.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, rogerable@realtek.com, devel@linuxdriverproject.org =E4=BA=8E 2013=E5=B9=B403=E6=9C=8825=E6=97=A5 14:00, Dan Carpenter =E5=86= =99=E9=81=93: > On Mon, Mar 25, 2013 at 10:13:56AM +0800, wei_wang@realsil.com.cn wro= te: >> +static int rts5249_optimize_phy(struct rtsx_pcr *pcr) >> +{ >> + int err; >> + >> + err =3D rtsx_pci_write_phy_register(pcr, 0x19, 0xFE46); >> + if (err < 0) >> + return err; >> + >> + mdelay(1); > Why do we have the mdelay() and the later msleep(5)? > rtsx_pci_write_phy_register() busy loops until the write succeeds or > it returns -ETIMEOUT. The extra wait here seems unnecessary. > > regards, > dan carpenter > > > . > =20 Hi, The busy loops in rtsx_pci_write_phy_register only tell us that the=20 write sequence succeeds. The device still needs to wait for a while=20 until the internal signal stable. Or else the timing won't fit the=20 requirement. All of the delays in the driver are necessary. BR, Wei