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From: Joonyoung Shim <jy0922.shim@samsung.com>
To: Seungwon Jeon <tgih.jun@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>,
	linux-mmc@vger.kernel.org, cjb@laptop.org, will.newton@gmail.com
Subject: Re: [PATCH] mmc: dw_mmc: clear INSTS register when initialize
Date: Thu, 25 Apr 2013 16:49:22 +0900	[thread overview]
Message-ID: <5178E002.6010902@samsung.com> (raw)
In-Reply-To: <51787CBA.80607@samsung.com>

On 04/25/2013 09:45 AM, Jaehoon Chung wrote:
> On 04/24/2013 12:05 PM, Joonyoung Shim wrote:
>> On 04/24/2013 10:34 AM, Seungwon Jeon wrote:
>>> On Tuesday, April 23, 2013, Jaehoon Chung wrote:
>>>> On 04/23/2013 06:57 PM, Seungwon Jeon wrote:
>>>>> Hi,
>>>>>
>>>>> On Thursday, April 18, 2013, Joonyoung Shim wrote:
>>>>>> If pending interrupt for IDMAC exists when probe, it will call interrupt
>>>>>> handler unnecessarily.
>>>>>>
>>>>>> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
>>>>>> ---
>>>>>>  drivers/mmc/host/dw_mmc.c |    3 +++
>>>>>>  1 file changed, 3 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>>>>> index 323c502..b0057a2 100644
>>>>>> --- a/drivers/mmc/host/dw_mmc.c
>>>>>> +++ b/drivers/mmc/host/dw_mmc.c
>>>>>> @@ -2192,6 +2192,7 @@ int dw_mci_probe(struct dw_mci *host)
>>>>>>
>>>>>>  	/* Clear the interrupts for the host controller */
>>>>>>  	mci_writel(host, RINTSTS, 0xFFFFFFFF);
>>>>>> +	mci_writel(host, IDSTS, 0xFFFFFFFF);
>>>>> 0x337 is correct for bits. Could you check the bit filed?
>> I feel it's better to use already existing defines than 0x337.
>>
>>>> I think that don't care which reset value used.
>>>> "It is recommended that you write 0xffff_ffff to the Raw Interrupt register @0x044 and IDSTS @0x8C
>>>> in order to clear any pending interrupts before setting the int_enable bit."
>>>> This boot mode case is also used the 0xffff_ffff.
>> Jaehoon, can i get this sentence from which document?
> That comment is existed at "Synopsys DesignWare Cores mobile storage host databook".
> So we can use the 0xffff_ffff.
>
> Best Regards,
> Jaehoon Chung
>>> In case IDSTS all 32bit are not for interrupt status unlike RINTSTS.
>>> IDSTS[31:17] is reserved and IDSTS[16:0] also contains 'reserved' and 'read-only' field.
>>> Correct use would be needed.

I know, but as Jaehoon said, it recommands to write 0xFFFFFFFF "Synopsys
DesignWare Cores mobile storage host databook" document, so i also think
it's ok.

Nevertheless if you want to use strict bits set, i can modify it. What
is your idea?

Thanks.

  reply	other threads:[~2013-04-25  7:48 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-18  5:21 [PATCH] mmc: dw_mmc: clear INSTS register when initialize Joonyoung Shim
2013-04-18  6:59 ` Jaehoon Chung
2013-04-23  9:57 ` Seungwon Jeon
2013-04-23 10:23   ` Jaehoon Chung
2013-04-24  1:34     ` Seungwon Jeon
2013-04-24  3:05       ` Joonyoung Shim
2013-04-25  0:45         ` Jaehoon Chung
2013-04-25  7:49           ` Joonyoung Shim [this message]
2013-04-26  4:24             ` Seungwon Jeon
2013-04-26  5:18               ` Jaehoon Chung
2013-04-26  5:35                 ` Seungwon Jeon

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