Re: [PATCH] mmc: add new au6601 driver

Ulf Hansson
2014-09-30T11:00:46Z

On 30 September 2014 12:11, Oleksij Rempel <linux@rempel-privat.de> wrote:
> Am 09.07.2014 um 14:52 schrieb Ulf Hansson:
>> [snip]
>>
>>>>
>>>> I am just a bit curious, does this controller support hardware busy
>>>> detection on DAT1 line while waiting for command completion?
>>>
>>> Do you mean AU6601_REG_BUS_STATUS?
>>> See at the beginning of patch.
>>
>> While reviewing the code, it seems like the controller are handling
>> hardware busy detection on DAT1. On the other hand you don't enable
>> MMC_CAP_WAIT_WHILE_BUSY, shouldn't you be doing that?
>
> Hi Ulf,
>
> what is better way to use sg with dma? This controller support only
> 0x4000 alight addresses. It is possible to solve it per driver basis,
> but i have seen already more then one driver which need it. Should it be
> done in mmc block code? Any other suggestions?

I don't quite follow. Does your DMA controller put constraints on
buffer alignment/length or is it the mmc controller?

I am aware of that drivers may have special treatments of buffer
alignment/length to be able to handle some corner cases. And yes we
don't have a common interface in the mmc core to handle that. I am not
sure how that could be done? Do you have any suggestions?

Kind regards
Uffe