From mboxrd@z Thu Jan  1 00:00:00 1970
From: Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: [PATCH v4 1/3] mmc: sdhci: Set DMA mask when adding host
Date: Wed, 16 Mar 2016 10:43:33 +0200
Message-ID: <56E91CB5.7030007@intel.com>
References: <1457316477-8153-1-git-send-email-acourbot@nvidia.com>
 <1457316477-8153-2-git-send-email-acourbot@nvidia.com>
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Return-path: <linux-kernel-owner@vger.kernel.org>
In-Reply-To: <1457316477-8153-2-git-send-email-acourbot@nvidia.com>
Sender: linux-kernel-owner@vger.kernel.org
To: Alexandre Courbot <acourbot@nvidia.com>, Ulf Hansson <ulf.hansson@linaro.org>, Arnd Bergmann <arnd@arndb.de>
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, gnurou@gmail.com
List-Id: linux-mmc@vger.kernel.org

On 07/03/16 04:07, Alexandre Courbot wrote:
> Set the DMA mask in sdhci_add_host() after we determined the
> capabilities of the device. 64-bit devices in particular are given the
> proper mask that ensures bounce buffers are not used.
> 
> Also disable DMA if no proper DMA mask can be set, as the DMA-API
> documentation specifies.
> 
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  drivers/mmc/host/sdhci.c | 48 +++++++++++++++++++++++++++++++++++++++++-------
>  1 file changed, 41 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index fd9139947fa3..920e1c996280 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -2857,6 +2857,36 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
>  
>  EXPORT_SYMBOL_GPL(sdhci_alloc_host);
>  
> +static int sdhci_set_dma_mask(struct sdhci_host *host)
> +{
> +	struct mmc_host *mmc = host->mmc;
> +	struct device *dev = mmc_dev(mmc);
> +	int ret = -EINVAL;
> +
> +	if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA)
> +		host->flags &= ~SDHCI_USE_64_BIT_DMA;
> +
> +	/* Try 64-bit mask if hardware is capable  of it */
> +	if (host->flags & SDHCI_USE_64_BIT_DMA) {
> +		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
> +		if (ret) {
> +			pr_warn("%s: Failed to set 64-bit DMA mask.\n",
> +				mmc_hostname(mmc));
> +			host->flags &= ~SDHCI_USE_64_BIT_DMA;
> +		}
> +	}
> +
> +	/* 32-bit mask as default & fallback */
> +	if (ret) {
> +		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));

What happens if device enumeration (e.g. of_dma_configure) has already set a
more restrictive DMA mask?

> +		if (ret)
> +			pr_warn("%s: Failed to set 32-bit DMA mask.\n",
> +				mmc_hostname(mmc));
> +	}
> +
> +	return ret;
> +}
> +
>  int sdhci_add_host(struct sdhci_host *host)
>  {
>  	struct mmc_host *mmc;
> @@ -2932,13 +2962,17 @@ int sdhci_add_host(struct sdhci_host *host)
>  		host->flags |= SDHCI_USE_64_BIT_DMA;
>  
>  	if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
> -		if (host->ops->enable_dma) {
> -			if (host->ops->enable_dma(host)) {
> -				pr_warn("%s: No suitable DMA available - falling back to PIO\n",
> -					mmc_hostname(mmc));
> -				host->flags &=
> -					~(SDHCI_USE_SDMA | SDHCI_USE_ADMA);
> -			}
> +		ret = sdhci_set_dma_mask(host);
> +
> +		if (!ret && host->ops->enable_dma)
> +			ret = host->ops->enable_dma(host);
> +
> +		if (ret) {
> +			pr_warn("%s: No suitable DMA available - falling back to PIO\n",
> +				mmc_hostname(mmc));
> +			host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA);
> +
> +			ret = 0;
>  		}
>  	}
>  
>