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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-60a1857c124sm5866353a12.36.2025.06.23.05.09.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Jun 2025 05:09:03 -0700 (PDT) Message-ID: <5bdae07b-a7b1-49be-b843-1704981bc63b@oss.qualcomm.com> Date: Mon, 23 Jun 2025 14:08:59 +0200 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property To: Krzysztof Kozlowski , Sarthak Garg , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Adrian Hunter Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_cang@quicinc.com, quic_nguyenb@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com, quic_bhaskarv@quicinc.com, kernel@oss.qualcomm.com References: <20250618072818.1667097-1-quic_sartgarg@quicinc.com> <20250618072818.1667097-3-quic_sartgarg@quicinc.com> <6040afd9-a2a8-49f0-85e9-95257b938156@kernel.org> <9627ed6f-2bb8-40b0-b647-5f659d87f2f9@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=NdDm13D4 c=1 sm=1 tr=0 ts=685943e1 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=COk6AnOGAAAA:8 a=yCTWpnfuZRHAWxVBKy4A:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjIzMDA3MyBTYWx0ZWRfXxFpd4Qj8G5Ml VkVGIWucQvrmzCcWm9mbqNiKRzzVmxtOUThgU76F05wZhPilCxgrcQTDfohePzA/2CWbObmR1jL JnxhPSp9T1ozPs8TiMQAhHaI2iuabs80zEzFhTDpMC9E5ETSMlqb3DOPTyoBCmn1nNAqgt6Xr7Y BRAMrLR5VNI/l+7biIJhbS+iq/fbBccQfNkKONUZjnYgmvg9G853nDEA0R4wIZyuIJwv+HzA8ay xC4q49Srd336ZVDhd0IGpvoVsTU8hcQ1Zrfgfi5LU6LJcwaIz89mlVeI9ECKg1ygTFRs13l9PUQ df4JXBGdrqClEbu593nLIZq8qKGSi8vlvGqTybFsCn5vbfXMTTU46eE9V3+GrckrNDkTqnx7bBg KjhjS2gj271Y+Eu/3L45FEmhBQuc4/X7y/MloEzvw/qJL4YeLRk+Oehmvw34qjokj1Ju/Uyo X-Proofpoint-ORIG-GUID: WghP4iuELQhyP8EsoQgu3G4t6uEYgf38 X-Proofpoint-GUID: WghP4iuELQhyP8EsoQgu3G4t6uEYgf38 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-23_03,2025-06-23_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 adultscore=0 clxscore=1015 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506230073 On 6/22/25 11:48 AM, Krzysztof Kozlowski wrote: > On 21/06/2025 12:20, Konrad Dybcio wrote: >> On 6/18/25 9:43 AM, Krzysztof Kozlowski wrote: >>> On 18/06/2025 09:28, Sarthak Garg wrote: >>>> Introduce a new optional device tree property `max-sd-hs-frequency` to >>>> limit the maximum frequency (in Hz) used for SD cards operating in >>>> High-Speed (HS) mode. >>>> >>>> This property is useful for platforms with vendor-specific hardware >>>> constraints, such as the presence of a level shifter that cannot >>>> reliably support the default 50 MHz HS frequency. It allows the host >>>> driver to cap the HS mode frequency accordingly. >>>> >>>> Signed-off-by: Sarthak Garg >>>> --- >>>> .../devicetree/bindings/mmc/mmc-controller-common.yaml | 10 ++++++++++ >>>> 1 file changed, 10 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml >>>> index 9a7235439759..1976f5f8c401 100644 >>>> --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml >>>> +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml >>>> @@ -93,6 +93,16 @@ properties: >>>> minimum: 400000 >>>> maximum: 384000000 >>>> >>>> + max-sd-hs-frequency: >>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>> + description: | >>>> + Maximum frequency (in Hz) to be used for SD cards operating in >>>> + High-Speed (HS) mode. This is useful for platforms with vendor-specific >>>> + limitations, such as the presence of a level shifter that cannot support >>>> + the default 50 MHz HS frequency or other. >>>> + minimum: 400000 >>>> + maximum: 50000000 >>> >>> This might be fine, but your DTS suggests clearly this is SoC compatible >>> deducible, which I already said at v1. >> >> I don't understand why you're rejecting a common solution to a problem >> that surely exists outside this one specific chip from one specific >> vendor, which may be caused by a multitude of design choices, including >> erratic board (not SoC) electrical design > > No one brought any arguments so far that common solution is needed. The > only argument provided - sm8550 - is showing this is soc design. > > I don't reject common solution. I provided review at v1 to which no one > responded, no one argued, no one provided other arguments. Okay, so the specific problem that causes this observable limitation exists on SM8550 and at least one more platform which is not upstream today. It can be caused by various electrical issues, in our specific case by something internal to the SoC (but external factors may apply too) Looking at the docs, a number of platforms have various limitations with regards to frequency at specific speed-modes, some of which seem to be handled implicitly by rounding in the clock framework's round/set_rate(). I can very easily imagine there are either boards or platforms in the wild, where the speed must be limited for various reasons, maybe some of them currently don't advertise it (like sm8550 on next/master) to hide that Konrad