From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mikko Perttunen <cyndis@kapsi.fi>
Subject: Re: [PATCH 4/7] arm64: dts: Add Tegra186 sdmmc pinctrl voltage states
Date: Wed, 25 Jul 2018 09:50:27 +0300
Message-ID: <6a37f483-4430-e70e-62a8-4e4181463735@kapsi.fi>
References: <1532090746-15863-1-git-send-email-avienamo@nvidia.com>
 <1532090746-15863-5-git-send-email-avienamo@nvidia.com>
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To: Aapo Vienamo <avienamo@nvidia.com>, Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Adrian Hunter <adrian.hunter@intel.com>, Mikko Perttunen <mperttunen@nvidia.com>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
List-Id: linux-mmc@vger.kernel.org

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>

On 20.07.2018 15:45, Aapo Vienamo wrote:
> Add pad voltage configuration nodes for sdmmc pads with configurable
> voltages on Tegra186.
> 
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> ---
>   arch/arm64/boot/dts/nvidia/tegra186.dtsi | 40 ++++++++++++++++++++++++++++++++
>   1 file changed, 40 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index b762227..7669756 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -4,6 +4,7 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/mailbox/tegra186-hsp.h>
>   #include <dt-bindings/memory/tegra186-mc.h>
> +#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
>   #include <dt-bindings/power/tegra186-powergate.h>
>   #include <dt-bindings/reset/tegra186-reset.h>
>   #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
> @@ -236,6 +237,9 @@
>   		clock-names = "sdhci";
>   		resets = <&bpmp TEGRA186_RESET_SDMMC1>;
>   		reset-names = "sdhci";
> +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +		pinctrl-0 = <&sdmmc1_3v3>;
> +		pinctrl-1 = <&sdmmc1_1v8>;
>   		status = "disabled";
>   	};
>   
> @@ -247,6 +251,9 @@
>   		clock-names = "sdhci";
>   		resets = <&bpmp TEGRA186_RESET_SDMMC2>;
>   		reset-names = "sdhci";
> +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +		pinctrl-0 = <&sdmmc2_3v3>;
> +		pinctrl-1 = <&sdmmc2_1v8>;
>   		status = "disabled";
>   	};
>   
> @@ -258,6 +265,9 @@
>   		clock-names = "sdhci";
>   		resets = <&bpmp TEGRA186_RESET_SDMMC3>;
>   		reset-names = "sdhci";
> +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +		pinctrl-0 = <&sdmmc3_3v3>;
> +		pinctrl-1 = <&sdmmc3_1v8>;
>   		status = "disabled";
>   	};
>   
> @@ -368,6 +378,36 @@
>   		      <0 0x0c380000 0 0x10000>,
>   		      <0 0x0c390000 0 0x10000>;
>   		reg-names = "pmc", "wake", "aotag", "scratch";
> +
> +		sdmmc1_3v3: sdmmc1-3v3 {
> +			pins = "sdmmc1-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> +		};
> +
> +		sdmmc1_1v8: sdmmc1-1v8 {
> +			pins = "sdmmc1-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> +		};
> +
> +		sdmmc2_3v3: sdmmc2-3v3 {
> +			pins = "sdmmc2-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> +		};
> +
> +		sdmmc2_1v8: sdmmc2-1v8 {
> +			pins = "sdmmc2-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> +		};
> +
> +		sdmmc3_3v3: sdmmc3-3v3 {
> +			pins = "sdmmc3-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> +		};
> +
> +		sdmmc3_1v8: sdmmc3-1v8 {
> +			pins = "sdmmc3-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> +		};
>   	};
>   
>   	ccplex@e000000 {
>