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From: Krzysztof Kozlowski <krzk@kernel.org>
To: dang.huynh@mainlining.org,
	Manivannan Sadhasivam <mani@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Sebastian Reichel <sre@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-unisoc@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-pm@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-hardening@vger.kernel.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH 09/25] dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller
Date: Wed, 17 Sep 2025 09:43:05 +0900	[thread overview]
Message-ID: <8e1f4728-1ba6-4db7-8e04-a8dde165ca72@kernel.org> (raw)
In-Reply-To: <20250917-rda8810pl-drivers-v1-9-9ca9184ca977@mainlining.org>

On 17/09/2025 22:25, Dang Huynh via B4 Relay wrote:
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"

Use consistent quotes, either ' or "

> +  - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/rda,8810pl-apclk.h>
> +
> +    ap_syscon: syscon@0 {
> +      compatible = "rda,8810pl-apsyscon", "syscon";
> +      reg = <0x0 0x1000>;
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +    };
> diff --git a/include/dt-bindings/clock/rda,8810pl-apclk.h b/include/dt-bindings/clock/rda,8810pl-apclk.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..372358e72436a28c0775519f49626c9c5f4c6046
> --- /dev/null
> +++ b/include/dt-bindings/clock/rda,8810pl-apclk.h
> @@ -0,0 +1,79 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +
> +#ifndef _DT_BINDINGS_CLK_RDA8810_H_
> +#define _DT_BINDINGS_CLK_RDA8810_H_
> +
> +/* soc clocks */
> +#define CLK_CPU 0
> +#define CLK_BUS 1
> +#define CLK_MEM 2
> +
> +#define CLK_USB 3
> +#define CLK_AXI 4
> +#define CLK_GCG 5
> +#define CLK_AHB1 6
> +#define CLK_APB1 7
> +#define CLK_APB2 8
> +
> +#define CLK_GPU 9
> +#define CLK_VPU 10
> +#define CLK_VOC 11
> +#define CLK_SFLSH 12
> +
> +#define CLK_UART1 13
> +#define CLK_UART2 14
> +#define CLK_UART3 15
> +
> +#define CLK_VOC2 16
> +#define CLK_EMMC 17
> +
> +#define CLK_COUNT (CLK_EMMC + 1)

Drop, not a binding.

> +
> +/* resets */
> +#define RST_CPU 0


Missing indentation before the values, everywhere.

> +
> +#define RST_AXI_VOC 1
> +#define RST_AXI_DMA 2
> +#define RST_AXI_CONNECT 3
> +#define RST_AXI_VPU 4
> +
> +#define RST_GCG_GOUDA 5
> +#define RST_GCG_CAMERA 6
> +#define RST_GCG_LCDC 7
> +
> +#define RST_AHB1_USBC 8
> +#define RST_AHB1_SPIFLASH 9
> +
> +#define RST_APB1_TIMER 10
> +#define RST_APB1_KEYPAD 11
> +#define RST_APB1_GPIO 12
> +#define RST_APB1_PWM 13
> +#define RST_APB1_AIF 14
> +#define RST_APB1_AUIFC 15
> +#define RST_APB1_I2C1 16
> +#define RST_APB1_I2C2 17
> +#define RST_APB1_I2C3 18
> +#define RST_APB1_COMREGS 19
> +#define RST_APB1_DMC 20
> +#define RST_APB1_DDRPHY_P 21
> +
> +#define RST_APB2_IFC 22
> +#define RST_APB2_UART1 23
> +#define RST_APB2_UART2 24
> +#define RST_APB2_UART3 25
> +#define RST_APB2_SPI1 26
> +#define RST_APB2_SPI2 27
> +#define RST_APB2_SPI3 28
> +#define RST_APB2_SDMMC1 29
> +#define RST_APB2_SDMMC2 30
> +#define RST_APB2_SDMMC3 31
> +#define RST_APB2_NAND 32
> +
> +#define RST_MEM_GPU 33
> +#define RST_MEM_VPU 34
> +#define RST_MEM_DMC 35
> +#define RST_MEM_DDRPHY_P 36
> +
> +#define RST_COUNT (RST_MEM_DDRPHY_P + 1)

Drop, not a binding.

> +
> +#endif /* _DT_BINDINGS_CLK_RDA8810_H_ */
> 


Best regards,
Krzysztof

  reply	other threads:[~2025-09-17  0:43 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-16 20:24 [PATCH 00/25] RDA8810PL Clock, RTC and MMC driver Dang Huynh via B4 Relay
2025-09-16 20:24 ` [PATCH 01/25] ARM: dts: unisoc: rda8810pl: Add label to GPIO nodes Dang Huynh via B4 Relay
2025-09-17  0:39   ` Krzysztof Kozlowski
2025-09-16 20:24 ` [PATCH 02/25] drivers: gpio: rda: Make IRQ optional Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 03/25] dt-bindings: gpio: rda: Make interrupts optional Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 04/25] rtc: Add timestamp for the end of 2127 Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 05/25] dt-bindings: rtc: Add RDA Micro RDA8810PL RTC Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 06/25] rtc: Add driver for RDA Micro SoC Dang Huynh via B4 Relay
2025-09-19 13:59   ` kernel test robot
2025-11-06 22:42   ` Alexandre Belloni
2025-09-16 20:25 ` [PATCH 07/25] ARM: dts: unisoc: rda8810pl: Enable Real-Time Clock Dang Huynh via B4 Relay
2025-09-17  0:40   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 08/25] ARM: dts: unisoc: rda8810pl: Enable ARM PMU Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 09/25] dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller Dang Huynh via B4 Relay
2025-09-17  0:43   ` Krzysztof Kozlowski [this message]
2025-09-16 20:25 ` [PATCH 10/25] drivers: clk: Add Clock and Reset Driver for RDA Micro RDA8810PL SoC Dang Huynh via B4 Relay
2025-09-20  4:50   ` Stephen Boyd
2025-09-16 20:25 ` [PATCH 11/25] dts: unisoc: rda8810pl: Enable clock/reset driver Dang Huynh via B4 Relay
2025-09-17  0:41   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 12/25] dts: unisoc: rda8810pl: Add OPP for CPU and define L2 cache Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 13/25] dts: unisoc: orangepi: Disable UART with no users Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 14/25] dt-bindings: power: reset: Add RDA Micro Modem Reset Dang Huynh via B4 Relay
2025-09-17  0:44   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 15/25] power: reset: Add basic power reset driver for RDA8810PL Dang Huynh via B4 Relay
2025-09-17  0:45   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 16/25] dts: unisoc: rda8810pl: Enable modem reset Dang Huynh via B4 Relay
2025-09-17  0:46   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 17/25] drivers: gpio: rda: Make direction register unreadable Dang Huynh via B4 Relay
2025-09-17  8:00   ` Bartosz Golaszewski
2025-09-16 20:25 ` [PATCH 18/25] dt-bindings: dma: Add RDA IFC DMA Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 19/25] dmaengine: Add RDA IFC driver Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 20/25] dts: unisoc: rda8810pl: Enable IFC Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 21/25] dt-bindings: mmc: Add RDA SDMMC controller Dang Huynh via B4 Relay
2025-09-17  0:00   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 22/25] mmc: host: Add RDA Micro SD/MMC driver Dang Huynh via B4 Relay
2025-09-17  0:48   ` Krzysztof Kozlowski
2025-09-16 20:25 ` [PATCH 23/25] dts: unisoc: rda8810pl: Add SDMMC controllers Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 24/25] dts: unisoc: orangepi-2g: Enable SD Card Dang Huynh via B4 Relay
2025-09-16 20:25 ` [PATCH 25/25] dts: unisoc: orangepi-i96: " Dang Huynh via B4 Relay
2025-09-17 10:03 ` [PATCH 00/25] RDA8810PL Clock, RTC and MMC driver Manivannan Sadhasivam
2025-09-18  5:02   ` Dang Huynh
  -- strict thread matches above, loose matches on Subject: below --
2025-09-16 20:07 Dang Huynh
2025-09-16 20:07 ` [PATCH 09/25] dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller Dang Huynh
2025-09-17 20:40   ` Conor Dooley

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