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From: Dinh Nguyen <dinguyen@kernel.org>
To: Stephen Boyd <sboyd@kernel.org>, jh80.chung@samsung.com
Cc: ulf.hansson@linaro.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCHv6 5/6] clk: socfpga: remove the setting of clk-phase for sdmmc_clk
Date: Tue, 1 Nov 2022 10:34:19 -0500	[thread overview]
Message-ID: <9d13da28-e7d5-f8d4-0e99-c89560d37833@kernel.org> (raw)
In-Reply-To: <20221027213934.E9219C433C1@smtp.kernel.org>



On 10/27/22 16:39, Stephen Boyd wrote:
> Quoting Dinh Nguyen (2022-10-26 07:16:30)
>> Now that the SDMMC driver supports setting the clk-phase, we can remove
>> the need to do it in the clock driver.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
>> ---
> 
> Do you want to take this through mmc tree?

Yes, I'll do that.

> 
> Acked-by: Stephen Boyd <sboyd@kernel.org>

Thanks!

Dinh

  reply	other threads:[~2022-11-01 15:34 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-26 14:16 [PATCHv6 1/6] dt-bindings: mmc: synopsys-dw-mshc: document "altr,sysmgr-syscon" Dinh Nguyen
2022-10-26 14:16 ` [PATCHv6 2/6] arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node Dinh Nguyen
2022-10-26 14:16 ` [PATCHv6 3/6] arm: " Dinh Nguyen
2022-10-26 14:16 ` [PATCHv6 4/6] mmc: dw_mmc-pltfm: socfpga: add method to configure clk-phase Dinh Nguyen
2022-11-02 15:41   ` Ulf Hansson
2022-10-26 14:16 ` [PATCHv6 5/6] clk: socfpga: remove the setting of clk-phase for sdmmc_clk Dinh Nguyen
2022-10-27 21:39   ` Stephen Boyd
2022-11-01 15:34     ` Dinh Nguyen [this message]
2022-10-26 14:16 ` [PATCHv6 6/6] arm: dts: socfpga: remove "clk-phase" in sdmmc_clk Dinh Nguyen
2022-10-26 20:50 ` [PATCHv6 1/6] dt-bindings: mmc: synopsys-dw-mshc: document "altr,sysmgr-syscon" Rob Herring
2022-10-31 15:10   ` Dinh Nguyen

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