Re: [PATCH] mmc: power class support

[Andrei Warkentin <andreiw@motorola.com>]

On Fri, Apr 1, 2011 at 7:28 PM, Andrei Warkentin <andreiw@motorola.com> wrote:
> Hi Russ,
>
> On Fri, Apr 1, 2011 at 10:58 AM, Russ Knize <Russ.Knize@motorola.com> wrote:
>> +                       /*
>> +                        * Ignore switch errors from buggy cards that actually
>> +                        * do switch successfully.
>> +                        */
>> +                       err = mmc_set_power_class(host, max_dtr, bus_width);
>> +                       if (err && err != -EBADMSG)
>> +                               goto free_card;
>> +
>
> 1) host->card is not yet set at this moment, you probably want to pass
> card to mmc_set_power_class as well .
> 2) It seems like you will call mmc_set_power_class even if bus_width
> == MMC_BUS_WIDTH_1. Is that supposed to work? 7.6.3 seems to imply
> power classes only apply to 4-bit and 8-bit bus widths. As does the
> paragraph on top of Page 138 of eMMC 4.41 spec, which says that for
> 1-bit bus configuration the default applies (class 0).
> 3) Since the current code supports DDR modes, you probably want to
> extend support for PWR_CL_DDR_52_(360|195) as well.
>
> Just curious, for the cards reporting switch errors but nonetheless
> switching to the power class, do they update the EXT_CSD field?
>

There was just a patch posted by Chuanxiao Dong ([PATCH v4 0/3]mmc:
enable TRIM/ERASE caps for SDHCI host) against SDHCI core to enable
setting proper timeout for R1B response-type commands, one of which is
CMD6 (SWITCH). The patch is applicable to the kernel sources you've
tested your patch on. Were the failures you've seen for cards erroring
on MMC_SWITCH timeouts? Could you test with that change for the parts
affected, and see if your problem in programming power level goes
away?

A