From mboxrd@z Thu Jan 1 00:00:00 1970 From: zhangfei gao Subject: Re: MMC runtime PM patches break libertas probe Date: Sat, 11 Jun 2011 10:33:37 +0800 Message-ID: References: <477F20668A386D41ADCC57781B1F704307FD0BF3B1@SC-VEXCH1.marvell.com> <477F20668A386D41ADCC57781B1F704307FD0BF3BE@SC-VEXCH1.marvell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: Received: from mail-vx0-f174.google.com ([209.85.220.174]:38153 "EHLO mail-vx0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758509Ab1FKCdi (ORCPT ); Fri, 10 Jun 2011 22:33:38 -0400 Received: by vxi39 with SMTP id 39so2628636vxi.19 for ; Fri, 10 Jun 2011 19:33:37 -0700 (PDT) In-Reply-To: Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: Ohad Ben-Cohen Cc: Bing Zhao , Daniel Drake , "linux-mmc@vger.kernel.org" , Mike Rapoport , Zhangfei Gao , Benson Chau On Fri, Jun 10, 2011 at 12:28 PM, Ohad Ben-Cohen wrote: > Hi Zhangfei, > > On Fri, Jun 10, 2011 at 5:02 AM, zhangfei gao wrote: >> Here is answer got from the sd8686 maintainer. >> >> For 8686, the SDIO state machine can only handle init sequence (CMD5, >> 5, 3, 7) from host once. If host sends another init sequence, it will >> not be able to handle CMD5 and causes the SDIO block to hang. Chips >> that are newer than 8686 will be able to handle multiple init sequence >> from host. > > Thanks for the reply ! > >> So yes, for 8686, an IO reset is needed before host can send a new set >> of init sequence. > > But if we're powering down and up the device first, then the init > sequence is considered the first one, and then we don't need an IO > reset, right ? That was what we wondered about. Hi Ohad, If you power down and up the device, then IO reset is not needed and 8686 can process host init sequence correctly. CC Benson. > > Thanks, > Ohad. >