Virtex-5 FPGA PCIE single-function device

[Muni Sekhar <munisekharrms@gmail.com>]

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Hello,

We are using the “Virtex-5 FPGA Integrated Endpoint Block for PCI
Express” in Linux platform. It supports only a single-function(Header
Type, Bit 7 is zero), but actually it is having different functions in
different Bar’s.

It has UART hardware module implemented in the first Base Address
Register and MMC host controller in other Base Address Register.

We are planning to develop our own pcie based uart driver for UART
hardware and planning to use the MMC kernel stack for MMC host
controller.

By default MMC kernel stack gets attached to this device. In the pcie
based uart driver, tried configuring the uart module after getting the
pci_dev structure with pci_get_device(not used the
pci_register_driver). After that I could able to communicate with the
UART registers even though MMC stack is attached to the device.

Now I am puzzled and stuck with how to proceed further on UART
Interrupt Service Routine for this kind of device. Can I use
request_irq() for uart isr, do you have any suggestion on this?

Any hint or help would be greatly appreciated.


Regards,
Sekhar