* [RESEND v2 1/2] mmc: mtk-sd: add Inline Crypto Engine clock control
2022-11-06 3:39 [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support Mengqi Zhang
@ 2022-11-06 3:39 ` Mengqi Zhang
2022-11-06 3:39 ` [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock Mengqi Zhang
2022-11-07 20:13 ` [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support Ulf Hansson
2 siblings, 0 replies; 6+ messages in thread
From: Mengqi Zhang @ 2022-11-06 3:39 UTC (permalink / raw)
To: chaotian.jing, ulf.hansson, robh+dt, krzysztof.kozlowski+dt,
matthias.bgg, wenbin.mei, angelogioacchino.delregno, mengqi.zhang
Cc: linux-mmc, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel
Add crypto clock control and ungate it before CQHCI init.
Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/mmc/host/mtk-sd.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 3f7f3a1e0df8..652a67f9b054 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -452,6 +452,7 @@ struct msdc_host {
struct clk *bus_clk; /* bus clock which used to access register */
struct clk *src_clk_cg; /* msdc source clock control gate */
struct clk *sys_clk_cg; /* msdc subsys clock control gate */
+ struct clk *crypto_clk; /* msdc crypto clock control gate */
struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
u32 mclk; /* mmc subsystem clock frequency */
u32 src_clk_freq; /* source clock frequency */
@@ -840,6 +841,7 @@ static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks)
static void msdc_gate_clock(struct msdc_host *host)
{
clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks);
+ clk_disable_unprepare(host->crypto_clk);
clk_disable_unprepare(host->src_clk_cg);
clk_disable_unprepare(host->src_clk);
clk_disable_unprepare(host->bus_clk);
@@ -855,6 +857,7 @@ static int msdc_ungate_clock(struct msdc_host *host)
clk_prepare_enable(host->bus_clk);
clk_prepare_enable(host->src_clk);
clk_prepare_enable(host->src_clk_cg);
+ clk_prepare_enable(host->crypto_clk);
ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks);
if (ret) {
dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n");
@@ -2672,6 +2675,15 @@ static int msdc_drv_probe(struct platform_device *pdev)
goto host_free;
}
+ /* only eMMC has crypto property */
+ if (!(mmc->caps2 & MMC_CAP2_NO_MMC)) {
+ host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto");
+ if (IS_ERR(host->crypto_clk))
+ host->crypto_clk = NULL;
+ else
+ mmc->caps2 |= MMC_CAP2_CRYPTO;
+ }
+
host->irq = platform_get_irq(pdev, 0);
if (host->irq < 0) {
ret = -EINVAL;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock
2022-11-06 3:39 [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support Mengqi Zhang
2022-11-06 3:39 ` [RESEND v2 1/2] mmc: mtk-sd: add Inline Crypto Engine clock control Mengqi Zhang
@ 2022-11-06 3:39 ` Mengqi Zhang
2022-11-06 9:33 ` Krzysztof Kozlowski
2022-11-07 9:25 ` AngeloGioacchino Del Regno
2022-11-07 20:13 ` [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support Ulf Hansson
2 siblings, 2 replies; 6+ messages in thread
From: Mengqi Zhang @ 2022-11-06 3:39 UTC (permalink / raw)
To: chaotian.jing, ulf.hansson, robh+dt, krzysztof.kozlowski+dt,
matthias.bgg, wenbin.mei, angelogioacchino.delregno, mengqi.zhang
Cc: linux-mmc, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel
Add optional crypto clock of the Inline Crypto Engine of Mediatek SoCs.
Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
---
.../devicetree/bindings/mmc/mtk-sd.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 6f8ecb4788eb..8ed94a12a03b 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -263,6 +263,28 @@ allOf:
- const: bus_clk
- const: sys_cg
+ - if:
+ properties:
+ compatible:
+ enum:
+ - mediatek,mt8186-mmc
+ - mediatek,mt8188-mmc
+ - mediatek,mt8195-mmc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: source clock
+ - description: HCLK which used for host
+ - description: independent source clock gate
+ - description: crypto clock used for data encrypt/decrypt (optional)
+ clock-names:
+ items:
+ - const: source
+ - const: hclk
+ - const: source_cg
+ - const: crypto
+
- if:
properties:
compatible:
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock
2022-11-06 3:39 ` [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock Mengqi Zhang
@ 2022-11-06 9:33 ` Krzysztof Kozlowski
2022-11-07 9:25 ` AngeloGioacchino Del Regno
1 sibling, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-06 9:33 UTC (permalink / raw)
To: Mengqi Zhang, chaotian.jing, ulf.hansson, robh+dt,
krzysztof.kozlowski+dt, matthias.bgg, wenbin.mei,
angelogioacchino.delregno
Cc: linux-mmc, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel
On 06/11/2022 04:39, Mengqi Zhang wrote:
> Add optional crypto clock of the Inline Crypto Engine of Mediatek SoCs.
>
> Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock
2022-11-06 3:39 ` [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock Mengqi Zhang
2022-11-06 9:33 ` Krzysztof Kozlowski
@ 2022-11-07 9:25 ` AngeloGioacchino Del Regno
1 sibling, 0 replies; 6+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-11-07 9:25 UTC (permalink / raw)
To: Mengqi Zhang, chaotian.jing, ulf.hansson, robh+dt,
krzysztof.kozlowski+dt, matthias.bgg, wenbin.mei
Cc: linux-mmc, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel
Il 06/11/22 04:39, Mengqi Zhang ha scritto:
> Add optional crypto clock of the Inline Crypto Engine of Mediatek SoCs.
>
> Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support
2022-11-06 3:39 [RESEND v2 0/2] Mediatek eMMC Inline Crypto Engine support Mengqi Zhang
2022-11-06 3:39 ` [RESEND v2 1/2] mmc: mtk-sd: add Inline Crypto Engine clock control Mengqi Zhang
2022-11-06 3:39 ` [RESEND v2 2/2] dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock Mengqi Zhang
@ 2022-11-07 20:13 ` Ulf Hansson
2 siblings, 0 replies; 6+ messages in thread
From: Ulf Hansson @ 2022-11-07 20:13 UTC (permalink / raw)
To: Mengqi Zhang
Cc: chaotian.jing, robh+dt, krzysztof.kozlowski+dt, matthias.bgg,
wenbin.mei, angelogioacchino.delregno, linux-mmc, devicetree,
linux-arm-kernel, linux-mediatek, linux-kernel
On Sun, 6 Nov 2022 at 04:39, Mengqi Zhang <mengqi.zhang@mediatek.com> wrote:
>
> Change in v2
> - change patch 1 commit title
> - change patch 2 commit title, and correct commit message
> - add crypto clock description base on new code base
>
> Mediatek eMMC hardware IP has Inline Crypto Engine (ICE), we support inline encryption now.
>
> This patchset supports Mediatek eMMC inline encryption which meets the upcoming version of the eMMC specification such as v5.1 or v5.2.
>
> Patch 1, add crypto clock control flow in mtk-sd driver, patch 2, document the device tree description about crypto clock.
>
> Mengqi Zhang (2):
> mmc: mtk-sd: add Inline Crypto Engine clock control
> dt-bindings: mmc: mtk-sd: add Inline Crypto Engine clock
>
> .../devicetree/bindings/mmc/mtk-sd.yaml | 22 +++++++++++++++++++
> drivers/mmc/host/mtk-sd.c | 12 ++++++++++
> 2 files changed, 34 insertions(+)
>
Applied for next, thanks!
Kind regards
Uffe
^ permalink raw reply [flat|nested] 6+ messages in thread