* [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI
@ 2022-11-16 12:36 Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 2/4] arm64: dts: qcom: sm8350: Add SDHCI2 Konrad Dybcio
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Konrad Dybcio @ 2022-11-16 12:36 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: patches, Konrad Dybcio, Ulf Hansson, Rob Herring,
Krzysztof Kozlowski, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel
Document the SDHCI on SM8350.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes in v2:
- pick up a-b
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 12def0f57e3e..31dfaff0048d 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -49,6 +49,7 @@ properties:
- qcom,sm6375-sdhci
- qcom,sm8150-sdhci
- qcom,sm8250-sdhci
+ - qcom,sm8350-sdhci
- qcom,sm8450-sdhci
- const: qcom,sdhci-msm-v5 # for sdcc version 5.0
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/4] arm64: dts: qcom: sm8350: Add SDHCI2
2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
@ 2022-11-16 12:36 ` Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 3/4] arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMM Konrad Dybcio
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2022-11-16 12:36 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: patches, Konrad Dybcio, Ulf Hansson, Rob Herring,
Krzysztof Kozlowski, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel, Konrad Dybcio
Add and configure the SDHCI host responsible for (mostly) SD Card and
its corresponding pins' sleep states.
The setup is *literally* 1:1 with 8450 (bar SDR50/104 may not be
broken).
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
No changes in v2.
arch/arm64/boot/dts/qcom/sm8350.dtsi | 79 ++++++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 552c0da3c479..9a118112facb 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1761,6 +1761,46 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 204>;
wakeup-parent = <&pdc>;
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ sdc2_sleep_state: sdc2-sleep-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
qup_uart3_default_state: qup-uart3-default-state {
rx-pins {
pins = "gpio18";
@@ -2329,6 +2369,45 @@ compute-cb@8 {
};
};
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sm8350-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "core", "xo";
+ resets = <&gcc GCC_SDCC2_BCR>;
+ interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
+ iommus = <&apps_smmu 0x4a0 0x0>;
+ power-domains = <&rpmhpd SM8350_CX>;
+ operating-points-v2 = <&sdhc2_opp_table>;
+ bus-width = <4>;
+ dma-coherent;
+
+ status = "disabled";
+
+ sdhc2_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-202000000 {
+ opp-hz = /bits/ 64 <202000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+ };
+ };
+
usb_1_hsphy: phy@88e3000 {
compatible = "qcom,sm8350-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/4] arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMM
2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 2/4] arm64: dts: qcom: sm8350: Add SDHCI2 Konrad Dybcio
@ 2022-11-16 12:36 ` Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 4/4] arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2 Konrad Dybcio
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2022-11-16 12:36 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: patches, Konrad Dybcio, Ulf Hansson, Rob Herring,
Krzysztof Kozlowski, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel, Konrad Dybcio
Sony ever so graciously provides GPIO line names in their downstream
kernel (though sometimes they are not 100% accurate and you can judge
that by simply looking at them and with what drivers they are used).
Add these to the Sagami-common / PDX215 DTSIs to better document the
hardware.
Diff between 215 and common:
< "NC",
< "NC",
> "WLC_I2C_SDA",
> "WLC_I2C_SCL",
< "NC",
> "WLC_INT_N",
> "CAM_MCLK4",
< "NC",
< "NC",
> "TOF_RST_N",
< "NC",
< "NC",
< "NC",
> "QLINK1_REQ",
> "QLINK1_EN",
> "QLINK1_WMSS_RESET_N",
It's pretty logical as 1 III has WLC (WireLess Charging), and an
additional 3D iToF sensor. As for QLINK, no idea.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
No changes in v2.
.../qcom/sm8350-sony-xperia-sagami-pdx215.dts | 206 ++++++++++++++++++
.../dts/qcom/sm8350-sony-xperia-sagami.dtsi | 203 +++++++++++++++++
2 files changed, 409 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami-pdx215.dts b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami-pdx215.dts
index d21bbeb603a6..c74c973a69d2 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami-pdx215.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami-pdx215.dts
@@ -11,3 +11,209 @@ / {
model = "Sony Xperia 1 III";
compatible = "sony,pdx215-generic", "qcom,sm8350";
};
+
+&tlmm {
+ gpio-line-names = "APPS_I2C_0_SDA", /* GPIO_0 */
+ "APPS_I2C_0_SCL",
+ "UWIDEC_PWR_EN",
+ "HAP_RST_N",
+ "WLC_I2C_SDA",
+ "WLC_I2C_SCL",
+ "PM8008_1_RESET_N",
+ "WLC_INT_N",
+ "OIS_TELE_I2C_SDA",
+ "OIS_TELE_I2C_SCL",
+ "PM8350_OPTION", /* GPIO_10 */
+ "NC",
+ "APPS_I2C_1_SDA",
+ "APPS_I2C_1_SCL",
+ "NC",
+ "NC",
+ "CAM1_RESET_N",
+ "LEO_CAM0_RESET_N",
+ "DEBUG_UART_TX",
+ "DEBUG_UART_RX",
+ "TS_I2C_SDA", /* GPIO_20 */
+ "TS_I2C_SCL",
+ "TS_RESET_N",
+ "TS_INT_N",
+ "DISP_RESET_N",
+ "SW_SERVICE",
+ "DISP_ERR_FG",
+ "TX_GTR_THRES_IN",
+ "NC",
+ "NC",
+ "NC", /* GPIO_30 */
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "SPK_AMP_INT_N",
+ "SPK_AMP_RESET_N",
+ "FP_INT_N",
+ "FP_RESET_N",
+ "NC", /* GPIO_40 */
+ "NC",
+ "DEBUG_GPIO0",
+ "FORCE_USB_BOOT",
+ "FP_SPI_MISO",
+ "FP_SPI_MOSI",
+ "FP_SPI_CLK",
+ "FP_SPI_CS_N",
+ "SPK_AMP_I2C_SDA",
+ "SPK_AMP_I2C_SCL",
+ "NC", /* GPIO_50 */
+ "HAP_INT_N",
+ "CAMSENSOR_I2C_SDA",
+ "CAMSENSOR_I2C_SCL",
+ "SBU_SW_OE",
+ "SBU_SW_SEL",
+ "NFC_ESE_SPI_MISO",
+ "NFC_ESE_SPI_MOSI",
+ "NFC_ESE_SPI_CLK",
+ "NFC_ESE_SPI_CS",
+ "NFC_I2C_SDA", /* GPIO_60 */
+ "NFC_I2C_SCL",
+ "NFC_EN",
+ "NFC_CLK_REQ",
+ "HST_WLAN_EN",
+ "HST_BT_EN",
+ "HW_ID_0",
+ "HW_ID_1",
+ "HST_BT_UART_CTS",
+ "HST_BT_UART_RFR",
+ "HST_BT_UART_TX", /* GPIO_70 */
+ "HST_BT_UART_RX",
+ "HAP_I2C_SDA",
+ "HAP_I2C_SCL",
+ "RF_LCD_ID_EN",
+ "RF_ID_EXTENSION",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HALL_INT_N", /* GPIO_80 */
+ "USB_CC_DIR",
+ "DISP_VSYNC",
+ "NC",
+ "NC",
+ "CAM_SOF_TELE",
+ "NFC_DWL_REQ",
+ "NFC_IRQ",
+ "WCD_RST_N",
+ "ALS_PROX_INT_N",
+ "NC", /* GPIO_90 */
+ "NC",
+ "TRAY_DET",
+ "UDON_SWITCH_SEL",
+ "PCIE0_RESET_N",
+ "PCIE0_CLK_REQ_N",
+ "PCIE0_WAKE_N",
+ "CAM_SOF",
+ "RF_ID_EXTENSION_2",
+ "RGBC_IR_INT",
+ "CAM_MCLK0", /* GPIO_100 */
+ "CAM_MCLK1",
+ "CAM_MCLK2",
+ "CAM_MCLK3",
+ "CAM_MCLK4",
+ "NC",
+ "CAM2_RESET_N",
+ "CCI_I2C0_SDA",
+ "CCI_I2C0_SCL",
+ "CCI_I2C1_SDA",
+ "CCI_I2C1_SCL", /* GPIO_110 */
+ "CCI_I2C2_SDA",
+ "CCI_I2C2_SCL",
+ "CCI_I2C3_SDA",
+ "CCI_I2C3_SCL",
+ "NC",
+ "PM8008_1_IRQ",
+ "CAM3_RESET_N",
+ "IMU1_INT",
+ "EXT_VD0_XVS",
+ "NC", /* GPIO_120 */
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HAP_I2S_CLK",
+ "HAP_I2S_DOUT",
+ "HAP_TRG1",
+ "HAP_I2S_SYNC",
+ "HST_BT_WLAN_SLIMBUS_CLK",
+ "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
+ "NC",
+ "UIM2_DETECT_EN",
+ "UIM2_DATA",
+ "UIM2_CLK",
+ "UIM2_RESET",
+ "UIM2_PRESENT",
+ "UIM1_DATA",
+ "UIM1_CLK",
+ "UIM1_RESET",
+ "TRAY_DET", /* GPIO_140 */
+ "SM_RFFE0_CLK",
+ "SM_RFFE0_DATA",
+ "SM_RFFE1_CLK",
+ "SM_RFFE1_DATA",
+ "SM_MSS_GRFC4",
+ "SM_MSS_GRFC5",
+ "SM_MSS_GRFC6",
+ "SM_MSS_GRFC7",
+ "SM_RFFE4_CLK",
+ "SM_RFFE4_DATA", /* GPIO_150 */
+ "WLAN_COEX_UART1_RX",
+ "WLAN_COEX_UART1_TX",
+ "HST_SW_CTRL",
+ "DISP_VDDR_EN",
+ "NC",
+ "NC",
+ "PA_INDICATOR_OR",
+ "TOF_RST_N",
+ "QLINK0_REQ",
+ "QLINK0_EN", /* GPIO_160 */
+ "QLINK0_WMSS_RESET_N",
+ "QLINK1_REQ",
+ "QLINK1_EN",
+ "QLINK1_WMSS_RESET_N",
+ "PM8008_2_IRQ",
+ "TELEC_PWR_EN",
+ "PM8008_2_RESET_N",
+ "WCD_SWR_TX_CLK",
+ "WCD_SWR_TX_DATA0",
+ "WCD_SWR_TX_DATA1", /* GPIO_170 */
+ "WCD_SWR_RX_CLK",
+ "WCD_SWR_RX_DATA0",
+ "WCD_SWR_RX_DATA1",
+ "SM_DMIC1_CLK",
+ "SM_DMIC1_DATA",
+ "SM_DMIC2_CLK",
+ "SM_DMIC2_DATA",
+ "SPK_AMP_I2S_CLK",
+ "SPK_AMP_I2S_WS",
+ "SPK_AMP_I2S_ASP_DIN", /* GPIO_180 */
+ "SPK_AMP_I2S_ASP_DOUT",
+ "WCD_SWR_TX_DATA2",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "IMU_SPI_MISO",
+ "IMU_SPI_MOSI",
+ "IMU_SPI_CLK",
+ "IMU_SPI_CS_N", /* GPIO_190 */
+ "MAG_I2C_SDA",
+ "MAG_I2C_SCL",
+ "SENSOR_I2C_SDA",
+ "SENSOR_I2C_SCL",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HST_BLE_UART_TX",
+ "HST_BLE_UART_RX", /* GPIO_200 */
+ "HST_WLAN_UART_TX",
+ "HST_WLAN_UART_RX";
+};
diff --git a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
index dab5145358e7..a428ce31ab4e 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
@@ -571,6 +571,209 @@ &spi14 {
&tlmm {
gpio-reserved-ranges = <44 4>;
+ gpio-line-names = "APPS_I2C_0_SDA", /* GPIO_0 */
+ "APPS_I2C_0_SCL",
+ "UWIDEC_PWR_EN",
+ "HAP_RST_N",
+ "NC",
+ "NC",
+ "PM8008_1_RESET_N",
+ "NC",
+ "OIS_TELE_I2C_SDA",
+ "OIS_TELE_I2C_SCL",
+ "PM8350_OPTION", /* GPIO_10 */
+ "NC",
+ "APPS_I2C_1_SDA",
+ "APPS_I2C_1_SCL",
+ "NC",
+ "NC",
+ "CAM1_RESET_N",
+ "LEO_CAM0_RESET_N",
+ "DEBUG_UART_TX",
+ "DEBUG_UART_RX",
+ "TS_I2C_SDA", /* GPIO_20 */
+ "TS_I2C_SCL",
+ "TS_RESET_N",
+ "TS_INT_N",
+ "DISP_RESET_N",
+ "SW_SERVICE",
+ "DISP_ERR_FG",
+ "TX_GTR_THRES_IN",
+ "NC",
+ "NC",
+ "NC", /* GPIO_30 */
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "SPK_AMP_INT_N",
+ "SPK_AMP_RESET_N",
+ "FP_INT_N",
+ "FP_RESET_N",
+ "NC", /* GPIO_40 */
+ "NC",
+ "DEBUG_GPIO0",
+ "FORCE_USB_BOOT",
+ "FP_SPI_MISO",
+ "FP_SPI_MOSI",
+ "FP_SPI_CLK",
+ "FP_SPI_CS_N",
+ "SPK_AMP_I2C_SDA",
+ "SPK_AMP_I2C_SCL",
+ "NC", /* GPIO_50 */
+ "HAP_INT_N",
+ "CAMSENSOR_I2C_SDA",
+ "CAMSENSOR_I2C_SCL",
+ "SBU_SW_OE",
+ "SBU_SW_SEL",
+ "NFC_ESE_SPI_MISO",
+ "NFC_ESE_SPI_MOSI",
+ "NFC_ESE_SPI_CLK",
+ "NFC_ESE_SPI_CS",
+ "NFC_I2C_SDA", /* GPIO_60 */
+ "NFC_I2C_SCL",
+ "NFC_EN",
+ "NFC_CLK_REQ",
+ "HST_WLAN_EN",
+ "HST_BT_EN",
+ "HW_ID_0",
+ "HW_ID_1",
+ "HST_BT_UART_CTS",
+ "HST_BT_UART_RFR",
+ "HST_BT_UART_TX", /* GPIO_70 */
+ "HST_BT_UART_RX",
+ "HAP_I2C_SDA",
+ "HAP_I2C_SCL",
+ "RF_LCD_ID_EN",
+ "RF_ID_EXTENSION",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HALL_INT_N", /* GPIO_80 */
+ "USB_CC_DIR",
+ "DISP_VSYNC",
+ "NC",
+ "NC",
+ "CAM_SOF_TELE",
+ "NFC_DWL_REQ",
+ "NFC_IRQ",
+ "WCD_RST_N",
+ "ALS_PROX_INT_N",
+ "NC", /* GPIO_90 */
+ "NC",
+ "TRAY_DET",
+ "UDON_SWITCH_SEL",
+ "PCIE0_RESET_N",
+ "PCIE0_CLK_REQ_N",
+ "PCIE0_WAKE_N",
+ "CAM_SOF",
+ "RF_ID_EXTENSION_2",
+ "RGBC_IR_INT",
+ "CAM_MCLK0", /* GPIO_100 */
+ "CAM_MCLK1",
+ "CAM_MCLK2",
+ "CAM_MCLK3",
+ "NC",
+ "NC",
+ "CAM2_RESET_N",
+ "CCI_I2C0_SDA",
+ "CCI_I2C0_SCL",
+ "CCI_I2C1_SDA",
+ "CCI_I2C1_SCL", /* GPIO_110 */
+ "CCI_I2C2_SDA",
+ "CCI_I2C2_SCL",
+ "CCI_I2C3_SDA",
+ "CCI_I2C3_SCL",
+ "NC",
+ "PM8008_1_IRQ",
+ "CAM3_RESET_N",
+ "IMU1_INT",
+ "EXT_VD0_XVS",
+ "NC", /* GPIO_120 */
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HAP_I2S_CLK",
+ "HAP_I2S_DOUT",
+ "HAP_TRG1",
+ "HAP_I2S_SYNC",
+ "HST_BT_WLAN_SLIMBUS_CLK",
+ "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
+ "NC",
+ "UIM2_DETECT_EN",
+ "UIM2_DATA",
+ "UIM2_CLK",
+ "UIM2_RESET",
+ "UIM2_PRESENT",
+ "UIM1_DATA",
+ "UIM1_CLK",
+ "UIM1_RESET",
+ "TRAY_DET", /* GPIO_140 */
+ "SM_RFFE0_CLK",
+ "SM_RFFE0_DATA",
+ "SM_RFFE1_CLK",
+ "SM_RFFE1_DATA",
+ "SM_MSS_GRFC4",
+ "SM_MSS_GRFC5",
+ "SM_MSS_GRFC6",
+ "SM_MSS_GRFC7",
+ "SM_RFFE4_CLK",
+ "SM_RFFE4_DATA", /* GPIO_150 */
+ "WLAN_COEX_UART1_RX",
+ "WLAN_COEX_UART1_TX",
+ "HST_SW_CTRL",
+ "DISP_VDDR_EN",
+ "NC",
+ "NC",
+ "PA_INDICATOR_OR",
+ "NC",
+ "QLINK0_REQ",
+ "QLINK0_EN", /* GPIO_160 */
+ "QLINK0_WMSS_RESET_N",
+ "NC",
+ "NC",
+ "NC",
+ "PM8008_2_IRQ",
+ "TELEC_PWR_EN",
+ "PM8008_2_RESET_N",
+ "WCD_SWR_TX_CLK",
+ "WCD_SWR_TX_DATA0",
+ "WCD_SWR_TX_DATA1", /* GPIO_170 */
+ "WCD_SWR_RX_CLK",
+ "WCD_SWR_RX_DATA0",
+ "WCD_SWR_RX_DATA1",
+ "SM_DMIC1_CLK",
+ "SM_DMIC1_DATA",
+ "SM_DMIC2_CLK",
+ "SM_DMIC2_DATA",
+ "SPK_AMP_I2S_CLK",
+ "SPK_AMP_I2S_WS",
+ "SPK_AMP_I2S_ASP_DIN", /* GPIO_180 */
+ "SPK_AMP_I2S_ASP_DOUT",
+ "WCD_SWR_TX_DATA2",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "IMU_SPI_MISO",
+ "IMU_SPI_MOSI",
+ "IMU_SPI_CLK",
+ "IMU_SPI_CS_N", /* GPIO_190 */
+ "MAG_I2C_SDA",
+ "MAG_I2C_SCL",
+ "SENSOR_I2C_SDA",
+ "SENSOR_I2C_SCL",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "HST_BLE_UART_TX",
+ "HST_BLE_UART_RX", /* GPIO_200 */
+ "HST_WLAN_UART_TX",
+ "HST_WLAN_UART_RX";
ts_int_default: ts-int-default-state {
pins = "gpio23";
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 4/4] arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2
2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 2/4] arm64: dts: qcom: sm8350: Add SDHCI2 Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 3/4] arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMM Konrad Dybcio
@ 2022-11-16 12:36 ` Konrad Dybcio
2022-11-16 16:17 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Ulf Hansson
2022-12-06 18:19 ` (subset) " Bjorn Andersson
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2022-11-16 12:36 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: patches, Konrad Dybcio, Ulf Hansson, Rob Herring,
Krzysztof Kozlowski, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel, Konrad Dybcio
Adjust regulators, add required pin setup and finally enable SDHCI2
to get the SD Card slot going on Sagami Xperias.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes in v2:
- drop stray newline
.../dts/qcom/sm8350-sony-xperia-sagami.dtsi | 29 ++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
index a428ce31ab4e..6ae700e72d1e 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
@@ -312,7 +312,8 @@ pm8350c_l8: ldo8 {
pm8350c_l9: ldo9 {
regulator-name = "pm8350c_l9";
regulator-min-microvolt = <2960000>;
- regulator-max-microvolt = <3008000>;
+ /* Originally max = 3008000 but SDHCI expects 2960000 */
+ regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -558,6 +559,18 @@ &qupv3_id_2 {
status = "okay";
};
+&sdhc_2 {
+ cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc2_default_state &sdc2_card_det_active>;
+ pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_sleep>;
+ vmmc-supply = <&pm8350c_l9>;
+ vqmmc-supply = <&pm8350c_l6>;
+ no-sdio;
+ no-mmc;
+ status = "okay";
+};
+
&slpi {
status = "okay";
firmware-name = "qcom/sm8350/Sony/sagami/slpi.mbn";
@@ -782,6 +795,20 @@ ts_int_default: ts-int-default-state {
bias-disable;
input-enable;
};
+
+ sdc2_card_det_active: sd-card-det-active-state {
+ pins = "gpio92";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ sdc2_card_det_sleep: sd-card-det-sleep-state {
+ pins = "gpio92";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
/* BIG WARNING! DO NOT TOUCH UFS, YOUR DEVICE WILL DIE! */
--
2.38.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI
2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
` (2 preceding siblings ...)
2022-11-16 12:36 ` [PATCH v2 4/4] arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2 Konrad Dybcio
@ 2022-11-16 16:17 ` Ulf Hansson
2022-12-06 18:19 ` (subset) " Bjorn Andersson
4 siblings, 0 replies; 6+ messages in thread
From: Ulf Hansson @ 2022-11-16 16:17 UTC (permalink / raw)
To: Konrad Dybcio
Cc: linux-arm-msm, andersson, agross, krzysztof.kozlowski, patch,
Rob Herring, Krzysztof Kozlowski, Bhupesh Sharma, linux-mmc,
devicetree, linux-kernel
On Wed, 16 Nov 2022 at 13:36, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> Document the SDHCI on SM8350.
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Applied for next, thanks!
Kind regards
Uffe
> ---
> Changes in v2:
> - pick up a-b
>
> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 12def0f57e3e..31dfaff0048d 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -49,6 +49,7 @@ properties:
> - qcom,sm6375-sdhci
> - qcom,sm8150-sdhci
> - qcom,sm8250-sdhci
> + - qcom,sm8350-sdhci
> - qcom,sm8450-sdhci
> - const: qcom,sdhci-msm-v5 # for sdcc version 5.0
>
> --
> 2.38.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: (subset) [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI
2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
` (3 preceding siblings ...)
2022-11-16 16:17 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Ulf Hansson
@ 2022-12-06 18:19 ` Bjorn Andersson
4 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2022-12-06 18:19 UTC (permalink / raw)
To: agross, linux-arm-msm, konrad.dybcio, krzysztof.kozlowski
Cc: robh+dt, linux-mmc, bhupesh.sharma, krzysztof.kozlowski+dt,
linux-kernel, devicetree, ulf.hansson, patches
On Wed, 16 Nov 2022 13:36:09 +0100, Konrad Dybcio wrote:
> Document the SDHCI on SM8350.
>
>
Applied, thanks!
[2/4] arm64: dts: qcom: sm8350: Add SDHCI2
commit: 60477435e4de3375775c3a0c0d21467f2ae7c398
[3/4] arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMM
commit: dcbb6fe5d669f1832ad6a0781d9d52d728c8cf60
[4/4] arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2
commit: 1aaa0772741820e2d15e0b1e109d776acb63d52a
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-12-06 18:21 UTC | newest]
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2022-11-16 12:36 [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 2/4] arm64: dts: qcom: sm8350: Add SDHCI2 Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 3/4] arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMM Konrad Dybcio
2022-11-16 12:36 ` [PATCH v2 4/4] arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2 Konrad Dybcio
2022-11-16 16:17 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document SM8350 SDHCI Ulf Hansson
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