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From: Satya Tangirala <satyat@google.com>
To: Peng Zhou <peng.zhou@mediatek.com>
Cc: Eric Biggers <ebiggers@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Chaotian Jing <chaotian.jing@mediatek.com>,
	linux-mmc@vger.kernel.org,
	Adrian Hunter <adrian.hunter@intel.com>,
	Wulin Li <wulin.li@mediatek.com>
Subject: Re: [PATCH 1/4] mmc: mediatek: add Inline Crypto Engine support
Date: Tue, 2 Mar 2021 05:33:10 +0000	[thread overview]
Message-ID: <YD3OFkjS8a6EUOHM@google.com> (raw)
In-Reply-To: <20210302024557.4868-1-peng.zhou@mediatek.com>

On Tue, Mar 02, 2021 at 10:45:57AM +0800, Peng Zhou wrote:
> - add crypto clock control and ungate it before CQHCI init
> - set MMC_CAP2_CRYPTO property of eMMC
> 
> Signed-off-by: Peng Zhou <peng.zhou@mediatek.com>
> ---
>  drivers/mmc/host/mtk-sd.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> index de09c6347524..1a5894ec551f 100644
> --- a/drivers/mmc/host/mtk-sd.c
> +++ b/drivers/mmc/host/mtk-sd.c
> @@ -442,6 +442,7 @@ struct msdc_host {
>  	struct clk *src_clk_cg; /* msdc source clock control gate */
>  	struct clk *sys_clk_cg;	/* msdc subsys clock control gate */
>  	struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
> +	struct clk *crypto_clk; /* msdc crypto clock */
>  	u32 mclk;		/* mmc subsystem clock frequency */
>  	u32 src_clk_freq;	/* source clock frequency */
>  	unsigned char timing;
> @@ -802,6 +803,7 @@ static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks)
>  
>  static void msdc_gate_clock(struct msdc_host *host)
>  {
> +	clk_disable_unprepare(host->crypto_clk);
>  	clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks);
>  	clk_disable_unprepare(host->src_clk_cg);
>  	clk_disable_unprepare(host->src_clk);
> @@ -822,7 +824,7 @@ static void msdc_ungate_clock(struct msdc_host *host)
>  		dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n");
>  		return;
>  	}
> -
> +	clk_prepare_enable(host->crypto_clk);
>  	while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB))
>  		cpu_relax();
>  }
> @@ -2510,6 +2512,16 @@ static int msdc_drv_probe(struct platform_device *pdev)
>  		goto host_free;
>  	}
>  
> +	/* only eMMC has crypto property */
> +	if ((mmc->caps2 & MMC_CAP2_NO_SD) &&
> +	    (mmc->caps2 & MMC_CAP2_NO_SDIO)) {
> +		host->crypto_clk = devm_clk_get(&pdev->dev, "crypto");
> +		if (IS_ERR(host->crypto_clk))
> +			host->crypto_clk = NULL;
> +		else
> +			mmc->caps2 |= MMC_CAP2_CRYPTO;
> +	}
> +
>  	host->irq = platform_get_irq(pdev, 0);
>  	if (host->irq < 0) {
>  		ret = -EINVAL;
> @@ -2580,6 +2592,8 @@ static int msdc_drv_probe(struct platform_device *pdev)
>  		host->dma_mask = DMA_BIT_MASK(32);
>  	mmc_dev(mmc)->dma_mask = &host->dma_mask;
>  
> +	/* here ungate due to cqhci init will access registers */
> +	msdc_ungate_clock(host);
>  	if (mmc->caps2 & MMC_CAP2_CQE) {
>  		host->cq_host = devm_kzalloc(mmc->parent,
>  					     sizeof(*host->cq_host),
> @@ -2616,7 +2630,6 @@ static int msdc_drv_probe(struct platform_device *pdev)
>  	spin_lock_init(&host->lock);
>  
>  	platform_set_drvdata(pdev, mmc);
> -	msdc_ungate_clock(host);
>  	msdc_init_hw(host);
>  
>  	ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq,
> -- 
> 2.18.0
Somehow I can't apply this patch using git am. It looks like the mail
isn't completely plain text (there's some html it seems), which may be
why git am is complaining.

       reply	other threads:[~2021-03-03  1:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20210302024557.4868-1-peng.zhou@mediatek.com>
2021-03-02  5:33 ` Satya Tangirala [this message]
2021-03-02 12:40   ` [PATCH 1/4] mmc: mediatek: add Inline Crypto Engine support Ulf Hansson
     [not found]     ` <1614947486.11643.4.camel@mbjsdccf07>
2021-03-05 23:24       ` Eric Biggers

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