[PATCH v5 2/6] dt-bindings: ufs: qcom: Add ICE phandle

Abel Vesa
2023-04-03T20:05:50Z

Starting with SM8550, the ICE will have its own devicetree node
so add the qcom,ice property to reference it.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---

The v4 is here:
https://lore.kernel.org/all/20230327134734.3256974-4-abel.vesa@linaro.org/

Changes since v4:
* Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce
it while making sure none of the other platforms are allowed to use it

Changes since v3:
* dropped the "and drop core clock" part from subject line

Changes since v2:
* dropped all changes except the qcom,ice property

.../devicetree/bindings/ufs/qcom,ufs.yaml | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index c5a06c048389..874de31d2c41 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -70,6 +70,10 @@ properties:
power-domains:
maxItems: 1

+ qcom,ice:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle to the Inline Crypto Engine node
+
reg:
minItems: 1
maxItems: 2
@@ -187,6 +191,21 @@ allOf:

# TODO: define clock bindings for qcom,msm8994-ufshc

+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sm8550-ufshc
+ then:
+ properties:
+ qcom,ice:
+ maxItems: 1
+ else:
+ properties:
+ qcom,ice: false
+
+
unevaluatedProperties: false

examples:
--
2.34.1