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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Biju Das <biju.das.au@gmail.com>
Subject: Re: [PATCH RFC/RFT 0/2] Enable 64-bit polling mode for R-Car Gen3 and
Date: Tue, 8 Jul 2025 22:29:04 +0200	[thread overview]
Message-ID: <aG1_kEZZwVPIj99q@shikoro> (raw)
In-Reply-To: <20250630081315.33288-1-biju.das.jz@bp.renesas.com>

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On Mon, Jun 30, 2025 at 09:13:09AM +0100, Biju Das wrote:
> As per the RZ/{G2L,G3E} HW manual SD_BUF0 can be accessed by 16/32/64
> bits. Most of the data transfer in SD/SDIO/eMMC mode is more than 8 bytes.
> During testing it is found that, if the DMA buffer is not aligned to 128
> bit it fallback to PIO mode. In such cases, 64-bit access is much more
> efficient than the current 16-bit.

Cool, I had this somewhere on my todo-list as well. I want to test but
it will probably be only on Friday. But looking forward to it!


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  parent reply	other threads:[~2025-07-08 20:29 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-30  8:13 [PATCH RFC/RFT 0/2] Enable 64-bit polling mode for R-Car Gen3 and Biju Das
2025-06-30  8:13 ` [PATCH RFC/RFT 1/2] mmc: tmio: Add 64-bit read/write support for SD_BUF0 in polling mode Biju Das
2025-07-22 19:26   ` Wolfram Sang
2025-06-30  8:13 ` [PATCH RFC/RFT 2/2] mmc: renesas_sdhi: Enable 64-bit " Biju Das
2025-07-21 11:29   ` Wolfram Sang
2025-07-22 19:26   ` Wolfram Sang
2025-07-08 20:29 ` Wolfram Sang [this message]
2025-07-09  5:48   ` [PATCH RFC/RFT 0/2] Enable 64-bit polling mode for R-Car Gen3 and Biju Das

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