On Thu, Aug 20, 2026 at 06:16:35PM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Replace the magic number 0xff, used for selecting the SD clock 1/1
> divider option, with a new SDHI_SD_CLK_CTL_DIV1 macro. This improves
> readability and self-documents the purpose of the value at each use
> site (setting/clearing the divider bits and comparing against
> CLK_CTL_DIV_MASK).
> 
> No functional change.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>