linux-mmc.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Adrian Hunter <adrian.hunter@intel.com>
To: Aapo Vienamo <avienamo@nvidia.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Stefan Agner <stefan@agner.ch>
Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH v2 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning
Date: Mon, 27 Aug 2018 14:25:44 +0300	[thread overview]
Message-ID: <b0b761ac-00fb-5a79-7a38-89b08c620c02@intel.com> (raw)
In-Reply-To: <1533924522-1037-26-git-send-email-avienamo@nvidia.com>

On 10/08/18 21:08, Aapo Vienamo wrote:
> Add a quirk to disable card clock when the tuning command is sent.
> 
> This has to be done to prevent the SDHCI controller from hanging on
> Tegra210. Without the quirk enabled there appears to be around 10%
> chance that the tuning sequence will fail and time out due to the
> controller locking up.
> 
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> ---
>  drivers/mmc/host/sdhci.c | 15 +++++++++++++++
>  drivers/mmc/host/sdhci.h |  2 ++
>  2 files changed, 17 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 04dc443..166b16f 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -2175,6 +2175,7 @@ static void sdhci_send_tuning(struct sdhci_host *host, u32 opcode)
>  	struct mmc_request mrq = {};
>  	unsigned long flags;
>  	u32 b = host->sdma_boundary;
> +	u16 clk;
>  
>  	spin_lock_irqsave(&host->lock, flags);
>  
> @@ -2183,6 +2184,13 @@ static void sdhci_send_tuning(struct sdhci_host *host, u32 opcode)
>  	cmd.mrq = &mrq;
>  
>  	mrq.cmd = &cmd;
> +
> +	if (host->quirks2 & SDHCI_QUIRK2_TUNE_DIS_CARD_CLK) {
> +		clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> +		clk &= ~SDHCI_CLOCK_CARD_EN;
> +		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

Rather than using a quirk, could you use the sdhci I/O accessors to disable
the clock before the tuning comment is written, udelay(1), and then enable
it again?

> +	}
> +
>  	/*
>  	 * In response to CMD19, the card sends 64 bytes of tuning
>  	 * block to the Host Controller. So we set the block size
> @@ -2213,6 +2221,13 @@ static void sdhci_send_tuning(struct sdhci_host *host, u32 opcode)
>  	mmiowb();
>  	spin_unlock_irqrestore(&host->lock, flags);
>  
> +	if (host->quirks2 & SDHCI_QUIRK2_TUNE_DIS_CARD_CLK) {
> +		udelay(1);
> +		clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> +		clk |= SDHCI_CLOCK_CARD_EN;
> +		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> +	}
> +
>  	/* Wait for Buffer Read Ready interrupt */
>  	wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1),
>  			   msecs_to_jiffies(50));
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 0a99008..cc411b0 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -452,6 +452,8 @@ struct sdhci_host {
>  #define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT			(1<<17)
>  /* Don't clear the SDHCI_TRANSFER_MODE register on tuning commands */
>  #define SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG	(1<<18)
> +/* Disable card clock during tuning */
> +#define SDHCI_QUIRK2_TUNE_DIS_CARD_CLK			(1<<19)
>  
>  	int irq;		/* Device IRQ */
>  	void __iomem *ioaddr;	/* Mapped address */
> 

  reply	other threads:[~2018-08-27 11:25 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-10 18:08 [PATCH v2 00/40] Tegra SDHCI add support for HS200 and UHS signaling Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 01/40] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo
2018-08-13 19:24   ` Rob Herring
2018-08-10 18:08 ` [PATCH v2 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Aapo Vienamo
2018-08-13 19:25   ` Rob Herring
2018-08-10 18:08 ` [PATCH v2 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 06/40] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 09/40] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning Aapo Vienamo
2018-08-27 11:01   ` Adrian Hunter
2018-08-28 14:45     ` Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 13/40] mmc: tegra: Poll for calibration completion Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 14/40] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 15/40] mmc: tegra: Power on the calibration pad Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 16/40] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 17/40] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 18/40] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 20/40] mmc: tegra: Add a workaround for tap value change glitch Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 21/40] mmc: tegra: Parse default trim and tap from dt Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 22/40] mmc: tegra: Configure default tap values Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 23/40] mmc: tegra: Configure default trim value on reset Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning Aapo Vienamo
2018-08-27 11:25   ` Adrian Hunter [this message]
2018-08-28 15:41     ` Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 30/40] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 31/40] arm64: dts: Add Tegra186 " Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 33/40] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 36/40] arm64: dts: tegra210: " Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 37/40] arm64: dts: tegra210: Add SDHCI tap and trim values Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 38/40] arm64: dts: tegra186: " Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Aapo Vienamo
2018-08-10 18:08 ` [PATCH v2 40/40] arm64: dts: tegra210: " Aapo Vienamo
2018-08-23  8:47 ` [PATCH v2 00/40] Tegra SDHCI add support for HS200 and UHS signaling Thierry Reding
2018-08-23 10:42   ` Ulf Hansson
2018-08-27 10:10 ` Thierry Reding
2018-08-27 10:26   ` Adrian Hunter
2018-08-27 11:43     ` Adrian Hunter
2018-08-27 14:10 ` Marcel Ziswiler
2018-08-27 15:50   ` Thierry Reding
2018-08-27 15:57     ` Thierry Reding
2018-08-27 16:27     ` Aapo Vienamo
2018-08-27 21:35     ` Marcel Ziswiler

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b0b761ac-00fb-5a79-7a38-89b08c620c02@intel.com \
    --to=adrian.hunter@intel.com \
    --cc=avienamo@nvidia.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jonathanh@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mperttunen@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=stefan@agner.ch \
    --cc=thierry.reding@gmail.com \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).