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charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=SPpCVPvH c=1 sm=1 tr=0 ts=6880b617 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=JqPsJo7-EimBCnq-3ZEA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzIzMDA4NiBTYWx0ZWRfX/ijKF+FquM8r 0OE7Lk6jkh0Ut7Hp129m3Un6x8WM4x+CyAx/60GxlHSS8br8MDrYIwI7hKEXfZStBScpgpAxyyL 2YeGGIZM8TV+2WrQ88fKlishgllwEUFDoYNqDOrQDx41KKE5zxDoj1VDZ/vw1NpyL1phmH/OTPd XSox4V5wX9y6qEDpt6A7H2bDXU2U5VvQmwSg7lM5d5xWeiY1S7BfC4KCgrqSRu+6NvfetHh+FEb vKtgmZbr8D1ML2CVnapeV4bw5LcecK4VUfjEQ04ssaxmnIgRfp6QyYdeZv/HD9Hf3sksx+GUJvH t+vg6HvLDQJG/aIfw0eTm8dAUeoyHs8uE9vLKQIypDjJTpTY1lIj1b9fiD2NouxUd0S2tINuq1+ xuABeQECCrG6zKqfpoXt4gwZ3f84PSi5cPL1wGXFnf9SFcC2gnF/e279IHsu2G1cxLwTUtQ9 X-Proofpoint-ORIG-GUID: bzxLKbzPhIuYGiZp3mKBMhq90WxeytPS X-Proofpoint-GUID: bzxLKbzPhIuYGiZp3mKBMhq90WxeytPS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-23_02,2025-07-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 adultscore=0 phishscore=0 malwarescore=0 mlxscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507230086 On 6/10/2025 5:47 PM, Ram Prakash Gupta wrote: > Hi Dmitry, > > As updated in [PATCH V3 2/2] of this series, I have started now to continue > this work. Will address your comment next. > > Thanks, > Ram > > On 1/22/2025 3:27 PM, Dmitry Baryshkov wrote: >> On Wed, Jan 22, 2025 at 03:17:06PM +0530, Sachin Gupta wrote: >>> This update introduces the capability to configure HS200 >>> and HS400 DLL settings via the device tree and parsing it. >>> >>> Signed-off-by: Sachin Gupta >>> --- >>> drivers/mmc/host/sdhci-msm.c | 86 ++++++++++++++++++++++++++++++++++++ >>> 1 file changed, 86 insertions(+) >>> >>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c >>> index 2a5e588779fc..cc7756a59c55 100644 >>> --- a/drivers/mmc/host/sdhci-msm.c >>> +++ b/drivers/mmc/host/sdhci-msm.c >>> @@ -256,6 +256,19 @@ struct sdhci_msm_variant_info { >>> const struct sdhci_msm_offset *offset; >>> }; >>> >>> +/* >>> + * DLL registers which needs be programmed with HSR settings. >>> + * Add any new register only at the end and don't change the >>> + * sequence. >>> + */ >>> +struct sdhci_msm_dll { >>> + u32 dll_config[2]; >>> + u32 dll_config_2[2]; >>> + u32 dll_config_3[2]; >>> + u32 dll_usr_ctl[2]; >>> + u32 ddr_config[2]; >>> +}; >>> + >>> struct sdhci_msm_host { >>> struct platform_device *pdev; >>> void __iomem *core_mem; /* MSM SDCC mapped address */ >>> @@ -264,6 +277,7 @@ struct sdhci_msm_host { >>> struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/ >>> /* core, iface, cal and sleep clocks */ >>> struct clk_bulk_data bulk_clks[4]; >>> + struct sdhci_msm_dll dll; >>> #ifdef CONFIG_MMC_CRYPTO >>> struct qcom_ice *ice; >>> #endif >>> @@ -292,6 +306,7 @@ struct sdhci_msm_host { >>> u32 dll_config; >>> u32 ddr_config; >>> bool vqmmc_enabled; >>> + bool artanis_dll; >>> }; >>> >>> static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) >>> @@ -2400,6 +2415,74 @@ static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host) >>> return ret; >>> } >>> >>> +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name, >>> + u32 **bw_vecs, int *len) >> It just reads an array from the DT, please rename the bw_vecs param >> which is inaccurate in this case. I will rename this to "dll_table". >>> +{ >>> + struct device_node *np = dev->of_node; >>> + u32 *arr = NULL; >>> + int ret = 0; >>> + int sz; >>> + >>> + if (!np) >>> + return -ENODEV; >>> + >>> + if (!of_get_property(np, prop_name, &sz)) >>> + return -EINVAL; >>> + >>> + sz = sz / sizeof(*arr); >>> + if (sz <= 0) >>> + return -EINVAL; >>> + >>> + arr = devm_kzalloc(dev, sz * sizeof(*arr), GFP_KERNEL); >>> + if (!arr) >>> + return -ENOMEM; >>> + >>> + ret = of_property_read_u32_array(np, prop_name, arr, sz); >>> + if (ret) { >>> + dev_err(dev, "%s failed reading array %d\n", prop_name, ret); >>> + *len = 0; >>> + return ret; >>> + } >>> + >>> + *bw_vecs = arr; >>> + *len = sz; >>> + ret = 0; >>> + >>> + return ret; >>> +} >>> + >>> +static int sdhci_msm_dt_parse_dll_info(struct device *dev, struct sdhci_msm_host *msm_host) >>> +{ >>> + int dll_table_len, dll_reg_count; >>> + u32 *dll_table = NULL; >>> + int i; >>> + >>> + msm_host->artanis_dll = false; >>> + >>> + if (sdhci_msm_dt_get_array(dev, "qcom,dll-hsr-list", >>> + &dll_table, &dll_table_len)) >>> + return -EINVAL; >>> + >>> + dll_reg_count = sizeof(struct sdhci_msm_dll) / sizeof(u32); >>> + >>> + if (dll_table_len != dll_reg_count) { >>> + dev_err(dev, "Number of HSR entries are not matching\n"); >>> + return -EINVAL; >>> + } >>> + >>> + for (i = 0; i < 2; i++) { >>> + msm_host->dll.dll_config[i] = dll_table[i]; >>> + msm_host->dll.dll_config_2[i] = dll_table[i + 1]; >>> + msm_host->dll.dll_config_3[i] = dll_table[i + 2]; >>> + msm_host->dll.dll_usr_ctl[i] = dll_table[i + 3]; >>> + msm_host->dll.ddr_config[i] = dll_table[i + 4]; >>> + } >>> + >>> + msm_host->artanis_dll = true; >> And the pointer to dll_table is lost, lingering for the driver lifetime. >> Please drop the devm_ part and kfree() it once it is not used anymore. ok, I ll allocate memory using kzalloc in function sdhci_msm_dt_get_array and kfree() after copying data in this function. Also the logic to copy the data in msm_host->dll.dll_config[x] is not correct above, had to fix it as I was observing DLL related issues, when testing different eMMC modes. Below is the correct code to copy data correctly from dll_table. "for (i = 0, j = 0; j < 2; i=i+5, j++) { msm_host->dll.dll_config[j] = dll_table[i]; msm_host->dll.dll_config_2[j] = dll_table[i + 1]; msm_host->dll.dll_config_3[j] = dll_table[i + 2]; msm_host->dll.dll_usr_ctl[j] = dll_table[i + 3]; msm_host->dll.ddr_config[j] = dll_table[i + 4]; }" since the parsing itself was not correct, had to go through whole code again and test all the modes of eMMC and SDCard. All registers values of DLL are now matching with expected values passed in dt, in all modes of eMMC and SDCard post required modes tuning. eMMC tested modes are HS400ES/HS400/HS200/HS50/DDR52. SDCard tested modes are SDR104/SDR50. Thanks, Ram >>> + >>> + return 0; >>> +} >>> + >>> static int sdhci_msm_probe(struct platform_device *pdev) >>> { >>> struct sdhci_host *host; >>> @@ -2446,6 +2529,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) >>> >>> msm_host->saved_tuning_phase = INVALID_TUNING_PHASE; >>> >>> + if (sdhci_msm_dt_parse_dll_info(&pdev->dev, msm_host)) >>> + goto pltfm_free; >>> + >>> ret = sdhci_msm_gcc_reset(&pdev->dev, host); >>> if (ret) >>> goto pltfm_free; >>> -- >>> 2.17.1 >>>