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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thomas Gleixner <tglx@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>, Frank Li <Frank.Li@nxp.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Haibo Chen <haibo.chen@nxp.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mmc@vger.kernel.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org, s32@nxp.com,
	Christophe Lizzi <clizzi@redhat.com>,
	Alberto Ruiz <aruizrui@redhat.com>,
	Enric Balletbo <eballetb@redhat.com>,
	Eric Chanudet <echanude@redhat.com>,
	Larisa Grigore <larisa.grigore@nxp.com>
Subject: Re: [PATCH v2 1/7] dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support
Date: Thu, 5 Mar 2026 13:39:29 +0100	[thread overview]
Message-ID: <e400bb73-3f80-4fcd-91a1-6b9b966c5e2d@kernel.org> (raw)
In-Reply-To: <aba2401e-e26c-44d1-b321-56cd18f11a37@oss.nxp.com>

On 05/03/2026 13:25, Ciprian Marian Costea wrote:
> On 3/5/2026 2:12 PM, Krzysztof Kozlowski wrote:
>> On 05/03/2026 13:02, Ciprian Marian Costea wrote:
>>> On 2/26/2026 9:31 AM, Krzysztof Kozlowski wrote:
>>>> On Wed, Feb 25, 2026 at 02:38:52PM +0100, Ciprian Costea wrote:
>>>>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>>>>
>>>>> Add compatible string for the interrupt steering controller used in NXP
>>>>> S32N79 SoC.
>>>>>
>>>>> The S32N79 SoC differs from the i.MX version by not implementing the
>>>>> CHANCTRL register, but otherwise maintains the same programming model and
>>>>> register layout.
>>>>>
>>>>> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
>>>>> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
>>>>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>>>> ---
>>>>>    .../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml   | 1 +
>>>>>    1 file changed, 1 insertion(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
>>>>> index 5c768c1e159c..caf3e4a1f26f 100644
>>>>> --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
>>>>> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
>>>>> @@ -22,6 +22,7 @@ properties:
>>>>>                  - fsl,imx94-irqsteer
>>>>>                  - fsl,imx95-irqsteer
>>>>>              - const: fsl,imx-irqsteer
>>>>> +      - const: nxp,s32n79-irqsteer
>>>>
>>>> So that should be part of enum with the first entry.
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>>
>>> Hello Krzysztof,
>>>
>>> Thanks for your review. Regarding this change, I was thinking since
>>> S32N79 irqsteer does not implement the 'CHANCTRL' register, it should
>>> not fallback to 'fsl,imx-irqsteer'. If the driver were to match on the
>>> fallback compatible, it would attempt to write to the non-existent
>>> CHANCTRL register.
>>>
>>> Am I wrong?
>>
>> No clue, I did not say anything about fallbacks.
>>
>> Best regards,
>> Krzysztof
> 
> Indeed, but your suggestion of moving 'nxp,s32n79-irqsteer' under the
> enum would fallback on 'fsl,imx-irqsteer'.
> 
> Am I misunderstanding your suggestion ?

Open the code. What is the first entry?

Best regards,
Krzysztof

  reply	other threads:[~2026-03-05 12:39 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-25 13:38 [PATCH v2 0/7] arm64: Add initial support for NXP S32N79 SoC Ciprian Costea
2026-02-25 13:38 ` [PATCH v2 1/7] dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support Ciprian Costea
2026-02-26  7:31   ` Krzysztof Kozlowski
2026-03-05 12:02     ` Ciprian Marian Costea
2026-03-05 12:12       ` Krzysztof Kozlowski
2026-03-05 12:25         ` Ciprian Marian Costea
2026-03-05 12:39           ` Krzysztof Kozlowski [this message]
2026-03-05 13:32             ` Ciprian Marian Costea
2026-03-05 13:45               ` Krzysztof Kozlowski
2026-02-25 13:38 ` [PATCH v2 2/7] dt-bindings: mmc: fsl-imx-esdhc: " Ciprian Costea
2026-02-25 13:38 ` [PATCH v2 3/7] dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board Ciprian Costea
2026-02-25 15:21   ` Frank Li
2026-02-25 15:22     ` Ciprian Marian Costea
2026-03-05 12:10     ` Ciprian Marian Costea
2026-02-26  7:32   ` Krzysztof Kozlowski
2026-02-26 15:17     ` Frank Li
2026-02-26 17:00       ` Krzysztof Kozlowski
2026-03-05 12:19         ` Ciprian Marian Costea
2026-03-05 12:08     ` Ciprian Marian Costea
2026-02-25 13:38 ` [PATCH v2 4/7] mmc: sdhci-esdhc-imx: add NXP S32N79 support Ciprian Costea
2026-02-25 15:26   ` Frank Li
2026-02-25 15:28     ` Ciprian Marian Costea
2026-03-05 12:26     ` Ciprian Marian Costea
2026-02-25 13:38 ` [PATCH v2 5/7] irqchip/imx-irqsteer: " Ciprian Costea
2026-02-25 13:38 ` [PATCH v2 6/7] irqchip: add ARCH_S32 dependency to Kconfig Ciprian Costea
2026-02-25 13:38 ` [PATCH v2 7/7] arm64: dts: freescale: Add minimal support for S32N79 Ciprian Costea
2026-02-25 15:30   ` Frank Li
2026-02-25 15:32     ` Ciprian Marian Costea
2026-03-05 12:28     ` Ciprian Marian Costea

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