From: "Benoît Thébaudeau" <benoit@wsystem.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Adrian Hunter <adrian.hunter@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
Fabio Estevam <fabio.estevam@nxp.com>,
Wolfram Sang <wsa@the-dreams.de>
Subject: Re: [PATCH 4/4] mmc: sdhci-esdhc-imx: Remove the ENGcm07207 workaround
Date: Mon, 29 May 2017 18:39:01 +0200 [thread overview]
Message-ID: <e586c2d4-5216-a5df-ebbb-89873825d545@wsystem.com> (raw)
In-Reply-To: <CAPDyKFo1Z-h_Ebr2FR4UvD_RuwfyOWGBk=6wc-GCRwdiqg-pnQ@mail.gmail.com>
On 2017/05/29 at 16:42, Ulf Hansson wrote:
> On 29 May 2017 at 10:07, Adrian Hunter <adrian.hunter@intel.com> wrote:
>> On 03/05/17 13:05, Benoît Thébaudeau wrote:
>>> The SDHCI_QUIRK_NO_MULTIBLOCK quirk was used as a workaround for the
>>> ENGcm07207 erratum. However, it caused excruciatingly slow SD transfers
>>> (300 kB/s on average), and this erratum actually does not imply that
>>> multiple-block transfers are not supported, so this was overkill.
>>>
>>> The suggested workaround for this erratum is to set SYSCTL.RSTA, but the
>>> simple DAT line software reset (which resets the DMA circuit among
>>> others) triggered by sdhci_finish_data() in case of errors seems to be
>>> sufficient. Indeed, generating errors in a controlled manner on i.MX25
>>> using the FEVT register right in the middle of read data transfers
>>> without this quirk shows that nothing is written to the buffer by the
>>> eSDHC past CMD12, and no extra Auto CMD12 is sent with AC12EN set, so
>>> the data transfers on AHB are properly aborted. For write data
>>> transfers, neither extra data nor extra Auto CMD12 is sent, as expected.
>>> Moreover, after intensive stress tests on i.MX25, removing
>>> SDHCI_QUIRK_NO_MULTIBLOCK seems to be safe.
>>>
>>> Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
>>
>> Aside from one comment below...
>>
>> I would expect to see Acks from other sdhci-esdhc-imx users. Nevertheless,
>> for sdhci:
>
> Yes, I would also appreciate some ack/tested by, from the
> corresponding sdhci variant users of this series.
>
> However, to allow it to get some results from linux-next, I have
> queued up this series for next (amending $subject patch according to
> the comment from Adrian). Thanks!
Please note that I had superseded this series with a v2 following Adrian's
comment.
>>
>> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>>
>>
>
> [...]
Best regards,
Benoît
next prev parent reply other threads:[~2017-05-29 16:39 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-03 10:05 [PATCH 1/4] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR Benoît Thébaudeau
2017-05-03 10:05 ` [PATCH 2/4] mmc: sdhci-esdhc-imx: Fix DAT line software reset Benoît Thébaudeau
2017-05-29 8:02 ` Adrian Hunter
2017-05-29 11:13 ` Fabio Estevam
2017-05-03 10:05 ` [PATCH 3/4] mmc: sdhci-esdhc-imx: Allow all supported prescaler values Benoît Thébaudeau
2017-05-29 8:03 ` Adrian Hunter
2017-05-29 11:14 ` Fabio Estevam
2017-05-03 10:05 ` [PATCH 4/4] mmc: sdhci-esdhc-imx: Remove the ENGcm07207 workaround Benoît Thébaudeau
2017-05-29 8:07 ` Adrian Hunter
2017-05-29 14:42 ` Ulf Hansson
2017-05-29 16:39 ` Benoît Thébaudeau [this message]
2017-05-29 11:14 ` Fabio Estevam
2017-05-04 8:47 ` [PATCH 1/4] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR Arnd Bergmann
2017-05-04 9:00 ` Benoît Thébaudeau
2017-05-04 9:37 ` Arnd Bergmann
2017-05-29 8:02 ` Adrian Hunter
2017-05-29 11:12 ` Fabio Estevam
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