From: Adrian Hunter <adrian.hunter@intel.com>
To: Victor Shih <victorshihgli@gmail.com>, ulf.hansson@linaro.org
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw,
Greg.tu@genesyslogic.com.tw, takahiro.akashi@linaro.org,
dlunev@chromium.org,
Victor Shih <victor.shih@genesyslogic.com.tw>,
Ben Chuang <ben.chuang@genesyslogic.com.tw>
Subject: Re: [PATCH V5 18/26] mmc: sdhci-uhs2: add uhs2_control() to initialise the interface
Date: Tue, 1 Nov 2022 19:15:00 +0200 [thread overview]
Message-ID: <e935fe27-ea94-366f-4fd4-f40b05af30b8@intel.com> (raw)
In-Reply-To: <20221019110647.11076-19-victor.shih@genesyslogic.com.tw>
On 19/10/22 14:06, Victor Shih wrote:
> This is a sdhci version of mmc's uhs2_set_reg operation.
> UHS-II interface (related registers) will be initialised here.
>
> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
> ---
> drivers/mmc/host/sdhci-uhs2.c | 103 ++++++++++++++++++++++++++++++++++
> drivers/mmc/host/sdhci.c | 12 ++++
> drivers/mmc/host/sdhci.h | 1 +
> 3 files changed, 116 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
> index afaca5d96938..c9d59b8ac37f 100644
> --- a/drivers/mmc/host/sdhci-uhs2.c
> +++ b/drivers/mmc/host/sdhci-uhs2.c
> @@ -350,6 +350,53 @@ static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> spin_unlock_irqrestore(&host->lock, flags);
> }
>
> +static void sdhci_uhs2_set_config(struct sdhci_host *host)
> +{
> + u32 value;
> + u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> + u16 sdhci_uhs2_gen_set_reg = (sdhci_uhs2_set_ptr + 0);
> + u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> + u16 sdhci_uhs2_tran_set_reg = (sdhci_uhs2_set_ptr + 8);
> + u16 sdhci_uhs2_tran_set_1_reg = (sdhci_uhs2_set_ptr + 12);
> +
> + /* Set Gen Settings */
> + sdhci_writel(host, host->mmc->uhs2_caps.n_lanes_set <<
> + SDHCI_UHS2_GEN_SET_N_LANES_POS, sdhci_uhs2_gen_set_reg);
> +
> + /* Set PHY Settings */
> + value = (host->mmc->uhs2_caps.n_lss_dir_set <<
> + SDHCI_UHS2_PHY_SET_N_LSS_DIR_POS) |
> + (host->mmc->uhs2_caps.n_lss_sync_set <<
> + SDHCI_UHS2_PHY_SET_N_LSS_SYN_POS);
> + if (host->mmc->flags & MMC_UHS2_SPEED_B)
> + value |= 1 << SDHCI_UHS2_PHY_SET_SPEED_POS;
> + sdhci_writel(host, value, sdhci_uhs2_phy_set_reg);
> +
> + /* Set LINK-TRAN Settings */
> + value = (host->mmc->uhs2_caps.max_retry_set <<
> + SDHCI_UHS2_TRAN_SET_RETRY_CNT_POS) |
> + (host->mmc->uhs2_caps.n_fcu_set <<
> + SDHCI_UHS2_TRAN_SET_N_FCU_POS);
> + sdhci_writel(host, value, sdhci_uhs2_tran_set_reg);
> + sdhci_writel(host, host->mmc->uhs2_caps.n_data_gap_set,
> + sdhci_uhs2_tran_set_1_reg);
> +}
> +
> +static int sdhci_uhs2_check_dormant(struct sdhci_host *host)
> +{
> + u32 val;
> + /* 100ms */
> + int timeout = 100000;
> +
> + if (read_poll_timeout_atomic(sdhci_readl, val, (val & SDHCI_UHS2_IN_DORMANT_STATE),
> + 100, timeout, true, host, SDHCI_PRESENT_STATE)) {
> + pr_warn("%s: UHS2 IN_DORMANT fail in 100ms.\n", mmc_hostname(host->mmc));
> + sdhci_dumpregs(host);
> + return -EIO;
> + }
> + return 0;
> +}
> +
> /*****************************************************************************\
> * *
> * MMC callbacks *
> @@ -435,6 +482,61 @@ static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
> return 0;
> }
>
> +static int sdhci_uhs2_do_detect_init(struct mmc_host *mmc);
> +
> +static int sdhci_uhs2_control(struct mmc_host *mmc, enum sd_uhs2_operation op)
> +{
> + struct sdhci_host *host = mmc_priv(mmc);
> + unsigned long flags;
> + int err = 0;
> + u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> + u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> +
> + DBG("Begin %s, act %d.\n", __func__, op);
DBG already has __func__. Please also check other DBG that
have duplicate __func__
> +
> + spin_lock_irqsave(&host->lock, flags);
This all relates to initialization or reinitialization, so I suspect
the spinlock is not needed here. What could it be racing with?
> +
> + switch (op) {
> + case UHS2_PHY_INIT:
> + err = sdhci_uhs2_do_detect_init(mmc);
> + break;
> + case UHS2_SET_CONFIG:
> + sdhci_uhs2_set_config(host);
> + break;
> + case UHS2_ENABLE_INT:
> + sdhci_clear_set_irqs(host, 0, SDHCI_INT_CARD_INT);
> + break;
> + case UHS2_DISABLE_INT:
> + sdhci_clear_set_irqs(host, SDHCI_INT_CARD_INT, 0);
> + break;
> + case UHS2_SET_SPEED_B:
> + sdhci_writeb(host, 1 << SDHCI_UHS2_PHY_SET_SPEED_POS,
> + sdhci_uhs2_phy_set_reg);
> + break;
> + case UHS2_CHECK_DORMANT:
> + err = sdhci_uhs2_check_dormant(host);
> + break;
> + case UHS2_DISABLE_CLK:
> + err = sdhci_uhs2_disable_clk(mmc);
> + break;
> + case UHS2_ENABLE_CLK:
> + err = sdhci_uhs2_enable_clk(mmc);
> + break;
> + case UHS2_POST_ATTACH_SD:
> + host->ops->uhs2_post_attach_sd(host);
> + break;
> + default:
> + pr_err("%s: input sd uhs2 operation %d is wrong!\n",
> + mmc_hostname(host->mmc), op);
> + err = -EIO;
> + break;
> + }
> +
> + spin_unlock_irqrestore(&host->lock, flags);
> +
> + return err;
> +}
> +
> /*****************************************************************************\
> * *
> * Driver init/exit *
> @@ -589,6 +691,7 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host *host)
> host->mmc_host_ops.start_signal_voltage_switch =
> sdhci_uhs2_start_signal_voltage_switch;
> host->mmc_host_ops.uhs2_set_ios = sdhci_uhs2_set_ios;
> + host->mmc_host_ops.uhs2_control = sdhci_uhs2_control;
>
> if (!host->mmc_host_ops.uhs2_detect_init)
> host->mmc_host_ops.uhs2_detect_init = sdhci_uhs2_do_detect_init;
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index de47c71995fb..b9db2e976010 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -236,6 +236,18 @@ void sdhci_reset(struct sdhci_host *host, u8 mask)
> }
> EXPORT_SYMBOL_GPL(sdhci_reset);
>
> +void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
> +{
> + u32 ier;
> +
> + ier = sdhci_readl(host, SDHCI_INT_ENABLE);
> + ier &= ~clear;
> + ier |= set;
> + sdhci_writel(host, ier, SDHCI_INT_ENABLE);
> + sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
> +}
> +EXPORT_SYMBOL_GPL(sdhci_clear_set_irqs);
This might as well be in sdhci-uhs2.c since that is the only
place that calls it. Then there is no need to export it.
> +
> static bool sdhci_do_reset(struct sdhci_host *host, u8 mask)
> {
> if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 22d7f47862ae..f049331bd0bc 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -869,6 +869,7 @@ void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq);
> int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq);
> void sdhci_set_bus_width(struct sdhci_host *host, int width);
> void sdhci_reset(struct sdhci_host *host, u8 mask);
> +void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set);
> void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
> int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
> void sdhci_enable_preset_value(struct sdhci_host *host, bool enable);
next prev parent reply other threads:[~2022-11-01 17:16 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 11:06 [PATCH V5 00/26] Add support UHS-II for GL9755 Victor Shih
2022-10-19 11:06 ` [PATCH V5 01/26] mmc: core: Cleanup printing of speed mode at card insertion Victor Shih
2022-10-19 11:06 ` [PATCH V5 02/26] mmc: core: Prepare to support SD UHS-II cards Victor Shih
2022-11-04 12:16 ` Christophe JAILLET
2022-11-04 15:09 ` Ulf Hansson
2022-10-19 11:06 ` [PATCH V5 03/26] mmc: core: Announce successful insertion of an SD UHS-II card Victor Shih
2022-10-19 11:06 ` [PATCH V5 04/26] mmc: core: Extend support for mmc regulators with a vqmmc2 Victor Shih
2022-10-19 11:06 ` [PATCH V5 05/26] mmc: core: Add definitions for SD UHS-II cards Victor Shih
2022-11-01 17:12 ` Adrian Hunter
2022-11-16 11:06 ` Victor Shih
2022-11-16 13:48 ` Adrian Hunter
2022-11-17 6:19 ` Ben Chuang
2022-11-17 16:03 ` Adrian Hunter
2022-11-18 1:19 ` Ben Chuang
2022-12-13 8:44 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 06/26] mmc: core: Support UHS-II card control and access Victor Shih
2022-10-19 11:06 ` [PATCH V5 07/26] mmc: sdhci: add a kernel configuration for enabling UHS-II support Victor Shih
2022-11-01 17:12 ` Adrian Hunter
2022-12-13 8:45 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 08/26] mmc: sdhci: add UHS-II related definitions in headers Victor Shih
2022-11-01 17:12 ` Adrian Hunter
2022-12-13 8:45 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 09/26] mmc: sdhci: add UHS-II module Victor Shih
2022-11-01 17:12 ` Adrian Hunter
2022-12-13 8:45 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 10/26] mmc: sdhci-uhs2: dump UHS-II registers Victor Shih
2022-11-01 17:13 ` Adrian Hunter
2022-12-13 8:45 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 11/26] mmc: sdhci-uhs2: add reset function and uhs2_mode function Victor Shih
2022-11-01 17:13 ` Adrian Hunter
2022-12-13 8:45 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 12/26] mmc: sdhci-uhs2: add set_power() to support vdd2 Victor Shih
2022-11-01 17:13 ` Adrian Hunter
2022-12-13 8:46 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 13/26] mmc: sdhci-uhs2: skip signal_voltage_switch() Victor Shih
2022-10-19 11:06 ` [PATCH V5 14/26] mmc: sdhci-uhs2: add set_timeout() Victor Shih
2022-11-01 17:14 ` Adrian Hunter
2022-12-13 8:46 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 15/26] mmc: sdhci-uhs2: add set_ios() Victor Shih
2022-11-01 17:14 ` Adrian Hunter
2022-12-13 8:46 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 16/26] mmc: sdhci-uhs2: add detect_init() to detect the interface Victor Shih
2022-11-01 17:14 ` Adrian Hunter
2022-12-13 8:47 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 17/26] mmc: sdhci-uhs2: add clock operations Victor Shih
2022-11-01 17:14 ` Adrian Hunter
2022-12-13 8:47 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 18/26] mmc: sdhci-uhs2: add uhs2_control() to initialise the interface Victor Shih
2022-11-01 17:15 ` Adrian Hunter [this message]
2022-12-13 8:47 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 19/26] mmc: sdhci-uhs2: add request() and others Victor Shih
2022-11-01 17:15 ` Adrian Hunter
2022-12-13 8:47 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 20/26] mmc: sdhci-uhs2: add irq() " Victor Shih
2022-11-01 17:15 ` Adrian Hunter
2022-12-13 8:48 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 21/26] mmc: sdhci-uhs2: add add_host() and others to set up the driver Victor Shih
2022-11-01 17:15 ` Adrian Hunter
2022-12-13 8:48 ` Victor Shih
2022-10-19 11:06 ` [PATCH V5 22/26] mmc: sdhci-uhs2: add pre-detect_init hook Victor Shih
2022-10-19 11:06 ` [PATCH V5 23/26] mmc: core: add post-mmc_attach_sd hook Victor Shih
2022-10-19 11:06 ` [PATCH V5 24/26] mmc: sdhci-uhs2: " Victor Shih
2022-10-19 11:06 ` [PATCH V5 25/26] mmc: sdhci-pci: add UHS-II support framework Victor Shih
2022-10-19 11:06 ` [PATCH V5 26/26] mmc: sdhci-pci-gli: enable UHS-II mode for GL9755 Victor Shih
2022-10-19 11:29 ` [PATCH V5 00/26] Add support UHS-II " Ulf Hansson
2022-11-01 2:24 ` Victor Shih
2022-11-01 17:28 ` Adrian Hunter
2022-11-04 10:43 ` Victor Shih
-- strict thread matches above, loose matches on Subject: below --
2022-10-17 9:11 Victor Shih
2022-10-17 9:11 ` [PATCH V5 18/26] mmc: sdhci-uhs2: add uhs2_control() to initialise the interface Victor Shih
2022-10-14 11:45 [PATCH V5 00/26] Add support UHS-II for GL9755 Victor Shih
2022-10-14 11:45 ` [PATCH V5 18/26] mmc: sdhci-uhs2: add uhs2_control() to initialise the interface Victor Shih
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e935fe27-ea94-366f-4fd4-f40b05af30b8@intel.com \
--to=adrian.hunter@intel.com \
--cc=Greg.tu@genesyslogic.com.tw \
--cc=HL.Liu@genesyslogic.com.tw \
--cc=ben.chuang@genesyslogic.com.tw \
--cc=benchuanggli@gmail.com \
--cc=dlunev@chromium.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=takahiro.akashi@linaro.org \
--cc=ulf.hansson@linaro.org \
--cc=victor.shih@genesyslogic.com.tw \
--cc=victorshihgli@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).