Re: [PATCH V5 2/4] mmc: sdhci: Add PLL Enable support to internal clock setup

[Adrian Hunter <adrian.hunter@intel.com>]

On 20/08/19 5:06 AM, Ben Chuang wrote:
> From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> 
> The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
> setup as part of the internal clock setup as described in 3.2.1 Internal
> Clock Setup Sequence of SD Host Controller Simplified Specification
> Version 4.20.
> 
> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
> Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
> Signed-off-by: Michael K Johnson <johnsonm@danlj.org>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci.c | 23 +++++++++++++++++++++++
>  drivers/mmc/host/sdhci.h |  1 +
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index bed0760a6c2a..9106ebc7a422 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1653,6 +1653,29 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
>  		udelay(10);
>  	}
>  
> +	if (host->version >= SDHCI_SPEC_410 && host->v4_mode) {
> +		clk |= SDHCI_CLOCK_PLL_EN;
> +		clk &= ~SDHCI_CLOCK_INT_STABLE;
> +		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> +
> +		/* Wait max 150 ms */
> +		timeout = ktime_add_ms(ktime_get(), 150);
> +		while (1) {
> +			bool timedout = ktime_after(ktime_get(), timeout);
> +
> +			clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> +			if (clk & SDHCI_CLOCK_INT_STABLE)
> +				break;
> +			if (timedout) {
> +				pr_err("%s: PLL clock never stabilised.\n",
> +				       mmc_hostname(host->mmc));
> +				sdhci_dumpregs(host);
> +				return;
> +			}
> +			udelay(10);
> +		}
> +	}
> +
>  	clk |= SDHCI_CLOCK_CARD_EN;
>  	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
>  }
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 199712e7adbb..72601a4d2e95 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -114,6 +114,7 @@
>  #define  SDHCI_DIV_HI_MASK	0x300
>  #define  SDHCI_PROG_CLOCK_MODE	0x0020
>  #define  SDHCI_CLOCK_CARD_EN	0x0004
> +#define  SDHCI_CLOCK_PLL_EN	0x0008
>  #define  SDHCI_CLOCK_INT_STABLE	0x0002
>  #define  SDHCI_CLOCK_INT_EN	0x0001
>  
>