* [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3
@ 2012-01-13 7:02 Roy Zang
2012-01-13 11:47 ` Anton Vorontsov
0 siblings, 1 reply; 4+ messages in thread
From: Roy Zang @ 2012-01-13 7:02 UTC (permalink / raw)
To: linux-mmc
Cc: cjb, Roy Zang, Lei Xu, Jerry Huang, Anton Vorontsov,
Priyanka Jain
From: Roy Zang <roy@royamd64.(none)>
When eSDHC module is enabled on P5020/P3041/P2041/P1010 with eSDHC
version 2.3, there is following errors:
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 whilst initialising SD card
mmc0: Unexpected interrupt 0x02000000.
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 whilst initialising SD card
mmc0: Unexpected interrupt 0x02000000.
It is because eSDHC controller has different bit setting for PROCTL
register at 0x28 comparing SD specification.
This patch sets DMAS bits correctly for byte operation and does not
change the default value of other field of PROCTL register.
For other FSL chips, such as MPC8536/P2020, PROCTL[DMAS]
bits are reserved and even if they are set to wrong bits, it will not
take effective.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Cc: Lei Xu <B33228@freescale.com>
Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>
Cc: Anton Vorontsov <cbouatmailru@gmail.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
---
this is a replacemnet patch for
http://patchwork.ozlabs.org/patch/103184/
or
http://permalink.gmane.org/gmane.linux.kernel.mmc/12066
according to feedback
http://article.gmane.org/gmane.linux.kernel.mmc/12072/match=c+must+know+nothing+esdhc+registers
and
http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-August/092402.html
Tested on P3041/P5020 and P4080
drivers/mmc/host/sdhci-of-esdhc.c | 30 ++++++++++++++++++++++++++++++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 01e5f62..36caad3 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -38,6 +38,22 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
int base = reg & ~0x3;
int shift = (reg & 0x3) * 8;
u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
+
+ /*
+ * "DMA select" locates at offset 0x28 in SD specification, but on
+ * P5020 or P3041, it locates at 0x29.
+ */
+ if (reg == SDHCI_HOST_CONTROL) {
+ u32 dma_bits;
+ dma_bits = in_be32(host->ioaddr + reg);
+ /* DMA select is 22,23 bits in Protocol Control Register*/
+ dma_bits = (dma_bits >> 5) & SDHCI_CTRL_DMA_MASK;
+
+ /* fixup the result */
+ ret &= ~SDHCI_CTRL_DMA_MASK;
+ ret |= dma_bits;
+ }
+
return ret;
}
@@ -56,6 +72,20 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
{
+ /*
+ * "DMA select" locates at offset 0x28 in SD specification, but on
+ * P5020 or P3041, it locates at 0x29.
+ */
+ if (reg == SDHCI_HOST_CONTROL) {
+ u32 dma_bits;
+ /* DMA select is 22,23 bits in Protocol Control Register*/
+ dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5;
+ clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5,
+ dma_bits);
+ val &= ~SDHCI_CTRL_DMA_MASK;
+ val |= (in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK);
+ }
+
/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
if (reg == SDHCI_HOST_CONTROL)
val &= ~ESDHC_HOST_CONTROL_RES;
--
1.7.0.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3
2012-01-13 7:02 [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3 Roy Zang
@ 2012-01-13 11:47 ` Anton Vorontsov
2012-01-14 13:09 ` Zang Roy-R61911
0 siblings, 1 reply; 4+ messages in thread
From: Anton Vorontsov @ 2012-01-13 11:47 UTC (permalink / raw)
To: Roy Zang; +Cc: linux-mmc, cjb, Lei Xu, Jerry Huang, Priyanka Jain
On Fri, Jan 13, 2012 at 03:02:01PM +0800, Roy Zang wrote:
[...]
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
> index 01e5f62..36caad3 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -38,6 +38,22 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
> int base = reg & ~0x3;
> int shift = (reg & 0x3) * 8;
> u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
> +
> + /*
> + * "DMA select" locates at offset 0x28 in SD specification, but on
> + * P5020 or P3041, it locates at 0x29.
> + */
> + if (reg == SDHCI_HOST_CONTROL) {
> + u32 dma_bits;
Just a small nit: per coding style, here should be empty line.
> + dma_bits = in_be32(host->ioaddr + reg);
> + /* DMA select is 22,23 bits in Protocol Control Register*/
> + dma_bits = (dma_bits >> 5) & SDHCI_CTRL_DMA_MASK;
> +
> + /* fixup the result */
> + ret &= ~SDHCI_CTRL_DMA_MASK;
> + ret |= dma_bits;
> + }
> +
> return ret;
> }
>
> @@ -56,6 +72,20 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
>
> static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
> {
> + /*
> + * "DMA select" locates at offset 0x28 in SD specification, but on
> + * P5020 or P3041, it locates at 0x29.
> + */
> + if (reg == SDHCI_HOST_CONTROL) {
> + u32 dma_bits;
Ditto. Empty line here.
> + /* DMA select is 22,23 bits in Protocol Control Register*/
> + dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5;
> + clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5,
> + dma_bits);
> + val &= ~SDHCI_CTRL_DMA_MASK;
> + val |= (in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK);
No need for the outer parentheses.
Otherwise the patch looks perfect.
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Thanks!
--
Anton Vorontsov
Email: cbouatmailru@gmail.com
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3
2012-01-13 11:47 ` Anton Vorontsov
@ 2012-01-14 13:09 ` Zang Roy-R61911
2012-01-20 15:33 ` Chris Ball
0 siblings, 1 reply; 4+ messages in thread
From: Zang Roy-R61911 @ 2012-01-14 13:09 UTC (permalink / raw)
To: Anton Vorontsov
Cc: linux-mmc@vger.kernel.org, cjb@laptop.org, Xu Lei-B33228,
Huang Changming-R66093, Jain Priyanka-B32167
Hi, Chris
Then could you help to update Anton's style comment and help to pick up this patch?
If a new update patch is needed, let me know :-)
Anton
Thanks for all the comments and our previous discussion.
Roy
> -----Original Message-----
> From: Anton Vorontsov [mailto:cbouatmailru@gmail.com]
> Sent: Friday, January 13, 2012 19:48 PM
> To: Zang Roy-R61911
> Cc: linux-mmc@vger.kernel.org; cjb@laptop.org; Xu Lei-B33228; Huang
> Changming-R66093; Jain Priyanka-B32167
> Subject: Re: [PATCH][upstream] eSDHC: fix errors when booting kernel on
> Freescale eSDHC version 2.3
>
> On Fri, Jan 13, 2012 at 03:02:01PM +0800, Roy Zang wrote:
> [...]
> > diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-
> of-esdhc.c
> > index 01e5f62..36caad3 100644
> > --- a/drivers/mmc/host/sdhci-of-esdhc.c
> > +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> > @@ -38,6 +38,22 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
> > int base = reg & ~0x3;
> > int shift = (reg & 0x3) * 8;
> > u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
> > +
> > + /*
> > + * "DMA select" locates at offset 0x28 in SD specification, but on
> > + * P5020 or P3041, it locates at 0x29.
> > + */
> > + if (reg == SDHCI_HOST_CONTROL) {
> > + u32 dma_bits;
>
> Just a small nit: per coding style, here should be empty line.
>
> > + dma_bits = in_be32(host->ioaddr + reg);
> > + /* DMA select is 22,23 bits in Protocol Control Register*/
> > + dma_bits = (dma_bits >> 5) & SDHCI_CTRL_DMA_MASK;
> > +
> > + /* fixup the result */
> > + ret &= ~SDHCI_CTRL_DMA_MASK;
> > + ret |= dma_bits;
> > + }
> > +
> > return ret;
> > }
> >
> > @@ -56,6 +72,20 @@ static void esdhc_writew(struct sdhci_host *host, u16
> val, int reg)
> >
> > static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
> > {
> > + /*
> > + * "DMA select" locates at offset 0x28 in SD specification, but on
> > + * P5020 or P3041, it locates at 0x29.
> > + */
> > + if (reg == SDHCI_HOST_CONTROL) {
> > + u32 dma_bits;
>
> Ditto. Empty line here.
>
> > + /* DMA select is 22,23 bits in Protocol Control Register*/
> > + dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5;
> > + clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5,
> > + dma_bits);
> > + val &= ~SDHCI_CTRL_DMA_MASK;
> > + val |= (in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK);
>
> No need for the outer parentheses.
>
> Otherwise the patch looks perfect.
>
> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
>
> Thanks!
>
> --
> Anton Vorontsov
> Email: cbouatmailru@gmail.com
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3
2012-01-14 13:09 ` Zang Roy-R61911
@ 2012-01-20 15:33 ` Chris Ball
0 siblings, 0 replies; 4+ messages in thread
From: Chris Ball @ 2012-01-20 15:33 UTC (permalink / raw)
To: Zang Roy-R61911
Cc: Anton Vorontsov, linux-mmc@vger.kernel.org, Xu Lei-B33228,
Huang Changming-R66093, Jain Priyanka-B32167
Hi Roy,
On Sat, Jan 14 2012, Zang Roy-R61911 wrote:
> Then could you help to update Anton's style comment and help to pick
> up this patch?
> If a new update patch is needed, let me know :-)
Thanks, pushed to mmc-next for 3.3 with Anton's style change and ACK.
- Chris.
--
Chris Ball <cjb@laptop.org> <http://printf.net/>
One Laptop Per Child
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-01-20 15:33 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-01-13 7:02 [PATCH][upstream] eSDHC: fix errors when booting kernel on Freescale eSDHC version 2.3 Roy Zang
2012-01-13 11:47 ` Anton Vorontsov
2012-01-14 13:09 ` Zang Roy-R61911
2012-01-20 15:33 ` Chris Ball
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).