From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?ISO-8859-2?Q?Micha=B3_Miros=B3aw?= <mirqus@gmail.com>
Subject: Re: [PATCH 2/3] ARM: MXC: mxcmmc: Teach the driver SDIO operations
Date: Wed, 31 Mar 2010 18:41:36 +0200
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To: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, Dan Williams <dan.j.williams@intel.com>, Volker Ernst <volker.ernst@txtr.com>, Jiri Kosina <jkosina@suse.cz>

2010/3/31 Daniel Mack <daniel@caiaq.de>:
> On Wed, Mar 31, 2010 at 03:03:39PM +0200, Sascha Hauer wrote:
>> On Tue, Mar 30, 2010 at 08:32:00PM +0200, Daniel Mack wrote:
>> > +static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enab=
le)
>> > +{
>> > + =A0 struct mxcmci_host *host =3D mmc_priv(mmc);
>> > + =A0 unsigned long flags;
>> > + =A0 u32 int_cntr;
>> > +
>> > + =A0 spin_lock_irqsave(&host->lock, flags);
>> > + =A0 host->use_sdio =3D enable;
>> > + =A0 int_cntr =3D readl(host->base + MMC_REG_INT_CNTR);
>> > +
>> > + =A0 if (enable)
>> > + =A0 =A0 =A0 =A0 =A0 int_cntr |=3D INT_SDIO_IRQ_EN;
>> > + =A0 else
>> > + =A0 =A0 =A0 =A0 =A0 int_cntr &=3D ~INT_SDIO_IRQ_EN;
>> > +
>> > + =A0 writel(int_cntr, host->base + MMC_REG_INT_CNTR);
>> > + =A0 spin_unlock_irqrestore(&host->lock, flags);
>>
>> The other places where MMC_REG_INT_CNTR is touched should be protect=
ed
>> by this spinlock aswell.
> Hmm, all other place don't do a read/modify/write cycle, so I'd say t=
he
> don't need protection?

If you miss spinlocks around the unconditional writes they might
happen between your readl() and writel().

Best Regards,
Micha=B3 Miros=B3aw