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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Borislav Petkov <bp@suse.de>
Cc: Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Brian Gerst <brgerst@gmail.com>,
	Chris Metcalf <cmetcalf@mellanox.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
	Jonathan Corbet <corbet@lwn.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
	Alexandre Julliard <julliard@winehq.org>,
	Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu>
Subject: Re: [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0
Date: Tue, 25 Apr 2017 19:04:20 -0700	[thread overview]
Message-ID: <1493172260.36058.26.camel@ranerica-desktop> (raw)
In-Reply-To: <20170411220816.2u3o72qnwcwq7jzc@pd.tnic>

On Wed, 2017-04-12 at 00:08 +0200, Borislav Petkov wrote:
> On Tue, Mar 07, 2017 at 04:32:36PM -0800, Ricardo Neri wrote:
> > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
> > Developer's Manual volume 2A states that when a SIB byte is used and the
> > base of the SIB byte points to R/EBP (i.e., base = 5) and the mod part
> > of the ModRM byte is zero, the value of such register will not be used
> > as part of the address computation. To signal this, a -EDOM error is
> > returned to indicate callers that they should ignore the value.
> > 
> > Also, for this particular case, a displacement of 32-bits should follow
> > the SIB byte if the mod part of ModRM is equal to zero. The instruction
> > decoder ensures that this is the case.
> > 
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
> > Cc: Colin Ian King <colin.king@canonical.com>
> > Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> > Cc: Qiaowei Ren <qiaowei.ren@intel.com>
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Cc: Nathan Howard <liverlint@gmail.com>
> > Cc: Adan Hawthorn <adanhawthorn@gmail.com>
> > Cc: Joe Perches <joe@perches.com>
> > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> > Cc: x86@kernel.org
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> > ---
> >  arch/x86/mm/mpx.c | 29 ++++++++++++++++++++++-------
> >  1 file changed, 22 insertions(+), 7 deletions(-)
> > 
> > diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
> > index d9e92d6..ef7eb67 100644
> > --- a/arch/x86/mm/mpx.c
> > +++ b/arch/x86/mm/mpx.c
> > @@ -121,6 +121,17 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
> >  
> >  	case REG_TYPE_BASE:
> >  		regno = X86_SIB_BASE(insn->sib.value);
> > +		/*
> > +		 * If mod is 0 and register R/EBP (regno=5) is indicated in the
> > +		 * base part of the SIB byte,
> 
> you can simply say here: "if SIB.base == 5, the base of the
> register-indirect addressing is 0."

This is better wording. I will change it.
> 
> > the value of such register should
> > +		 * not be used in the address computation. Also, a 32-bit
> 
> Not "Also" but "In this case, a 32-bit displacement..."

Will change.
> 
> > +		 * displacement is expected in this case; the instruction
> > +		 * decoder takes care of it. This is true for both R13 and
> > +		 * R/EBP as REX.B will not be decoded.
> 
> You don't need that sentence as the only thing that matters is ModRM.mod
> being 0.

For the specific case of ModRM.mod being 0, I feel I need to clarify
that REX.B is not decoded and if SIB.base is %r13 the base is also 0.
This comment adds clarity because REX.X is decoded when determining
SIB.index.
> 
> > +		 */
> > +		if (regno == 5 && X86_MODRM_MOD(insn->modrm.value) == 0)
> 
> The 0 test we normally do with the ! (also flip parts of if-condition):
> 
> 		if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5)

Will change it.
> 
> > +			return -EDOM;
> > +
> >  		if (X86_REX_B(insn->rex_prefix.value))
> >  			regno += 8;
> >  		break;
> > @@ -161,16 +172,21 @@ static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs)
> >  		eff_addr = regs_get_register(regs, addr_offset);
> >  	} else {
> >  		if (insn->sib.nbytes) {
> > +			/*
> > +			 * Negative values in the base and index offset means
> > +			 * an error when decoding the SIB byte. Except -EDOM,
> > +			 * which means that the registers should not be used
> > +			 * in the address computation.
> > +			 */
> >  			base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE);
> > -			if (base_offset < 0)
> > +			if (unlikely(base_offset == -EDOM))
> > +				base = 0;
> > +			else if (unlikely(base_offset < 0))
> 
> Bah, unlikely's in something which is not really a hot path. They only
> encumber readability, no need for them.

I will remove them.

Thanks and BR,
Ricardo


  reply	other threads:[~2017-04-26  2:04 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-08  0:32 [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-04-11 21:56   ` Borislav Petkov
2017-04-26  1:40     ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri
2017-04-11 11:31   ` Borislav Petkov
2017-04-26  1:39     ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0 Ricardo Neri
2017-04-11 22:08   ` Borislav Petkov
2017-04-26  2:04     ` Ricardo Neri [this message]
2017-04-26  8:05       ` Borislav Petkov
2017-04-27 22:49         ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri
2017-04-12 10:03   ` Borislav Petkov
2017-04-26  2:05     ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets Ricardo Neri
2017-04-12 16:28   ` Borislav Petkov
2017-04-26 18:13     ` Ricardo Neri
2017-04-28 10:40       ` Borislav Petkov
2017-03-08  0:32 ` [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-04-18  9:42   ` Borislav Petkov
2017-04-26 20:44     ` Ricardo Neri
2017-04-26 20:47       ` Ricardo Neri
2017-04-30 17:15       ` Borislav Petkov
2017-05-05 18:31         ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-04-19 10:26   ` Borislav Petkov
2017-04-26 21:51     ` Ricardo Neri
2017-05-04 11:02       ` Borislav Petkov
2017-05-12  2:13         ` Ricardo Neri
2017-05-15 17:27           ` Borislav Petkov
2017-03-08  0:32 ` [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address Ricardo Neri
2017-04-20  8:25   ` Borislav Petkov
2017-04-26 22:37     ` Ricardo Neri
2017-05-05 17:19       ` Borislav Petkov
2017-05-12  2:09         ` Ricardo Neri
2017-04-26 22:52     ` Ricardo Neri
2017-05-05 17:28       ` Borislav Petkov
2017-05-12  2:06         ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes Ricardo Neri
2017-04-20 13:06   ` Borislav Petkov
2017-04-27  1:07     ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero Ricardo Neri
2017-04-21 10:52   ` Borislav Petkov
2017-04-27  1:29     ` Ricardo Neri
2017-05-07 17:20       ` Borislav Petkov
2017-05-12  1:57         ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation Ricardo Neri
2017-04-21 14:55   ` Borislav Petkov
2017-04-27  1:31     ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri
2017-04-25 13:51   ` Borislav Petkov
2017-04-27  3:33     ` Ricardo Neri
2017-05-08 11:42       ` Borislav Petkov
2017-05-12  1:55         ` Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 13/21] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 14/21] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 15/21] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-03-08 16:08   ` Andy Lutomirski
2017-03-08  0:32 ` [v6 PATCH 16/21] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 17/21] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 18/21] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 19/21] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-03-08 15:54   ` Andy Lutomirski
2017-03-08  0:32 ` [v6 PATCH 20/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-03-08  0:32 ` [v6 PATCH 21/21] selftests/x86: Add tests for " Ricardo Neri
2017-03-08 15:56   ` Andy Lutomirski
2017-03-10 23:38     ` Ricardo Neri
2017-03-08 14:08 ` [v6 PATCH 00/21] x86: Enable " Stas Sergeev
2017-03-08 16:06   ` Andy Lutomirski
2017-03-08 16:29     ` Stas Sergeev
2017-03-08 16:46       ` Andy Lutomirski
2017-03-08 16:53         ` Stas Sergeev
2017-03-09  1:11           ` Ricardo Neri
2017-03-09 22:05             ` Stas Sergeev
2017-03-10  2:41             ` Andy Lutomirski
2017-03-10 10:30               ` Stas Sergeev
2017-03-10 21:04                 ` Andy Lutomirski
2017-03-10 21:37                   ` Stas Sergeev
2017-03-09  1:15         ` Ricardo Neri
2017-03-09 22:10           ` Stas Sergeev
2017-03-10  2:39             ` Andy Lutomirski
2017-03-10 11:33               ` Stas Sergeev
2017-03-10 14:17                 ` Andy Lutomirski
2017-03-11  1:22                   ` Ricardo Neri
2017-03-10 23:59                 ` Ricardo Neri
2017-03-13 21:25                   ` Stas Sergeev
2017-03-27 23:46                     ` Ricardo Neri
2017-03-28  9:38                       ` Stas Sergeev
2017-03-29  4:38                         ` Ricardo Neri
2017-03-29 20:55                           ` Stas Sergeev
2017-03-30  5:14                             ` Ricardo Neri
2017-03-30 10:10                               ` Stas Sergeev
2017-03-31  1:33                                 ` Ricardo Neri
2017-03-31 14:11                                   ` Alexandre Julliard
2017-03-31 21:26                                     ` Stas Sergeev
2017-04-01  2:18                                       ` Andy Lutomirski
2017-04-04  2:02                                     ` Ricardo Neri
2017-04-04  6:08                                       ` Alexandre Julliard
2017-04-01 13:08                               ` Stas Sergeev
2017-04-01 17:49                                 ` H. Peter Anvin
2017-04-04  2:05                                 ` Ricardo Neri
2017-04-04  8:03                                   ` Stas Sergeev
2017-03-10 23:58               ` Ricardo Neri
2017-03-09  0:46   ` Ricardo Neri
2017-03-09 22:01     ` Stas Sergeev
2017-03-10 23:47       ` Ricardo Neri
2017-03-10 23:58         ` Stas Sergeev
2017-03-11  0:13           ` Ricardo Neri
2017-03-08 16:07 ` Andy Lutomirski

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