From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Brian Gerst <brgerst@gmail.com>,
Chris Metcalf <cmetcalf@mellanox.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Liang Z Li <liang.z.li@intel.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
Jonathan Corbet <corbet@lwn.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
Alexandre Julliard <julliard@winehq.org>,
Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kern
Subject: [PATCH v4 01/17] x86/mpx: Do not use SIB index if index points to R/ESP
Date: Wed, 22 Feb 2017 22:36:50 -0800 [thread overview]
Message-ID: <20170223063706.71554-2-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20170223063706.71554-1-ricardo.neri-calderon@linux.intel.com>
Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
Developer's Manual volume 2A states that when memory addressing is used
(i.e., mod part of ModR/M is not 3), a SIB byte is used and the index of
the SIB byte points to the R/ESP (i.e., index = 4), the index should not be
used in the computation of the memory address.
In these cases the address is simply the value present in the register
pointed by the base part of the SIB byte plus the displacement byte.
An example of such instruction could be
insn -0x80(%rsp)
This is represented as:
[opcode] 4c 23 80
ModR/M=0x4c: mod: 0x1, reg: 0x1: r/m: 0x4(R/ESP)
SIB=0x23: sc: 0, index: 0x100(R/ESP), base: 0x11(R/EBX):
Displacement -0x80
The correct address is (base) + displacement; no index is used.
We can achieve the desired effect of not using the index by making
get_reg_offset return -EDOM in this particular case. This value indicates
callers that they should not use the index to calculate the address.
EINVAL continues to indicate that an error when decoding the SIB byte.
Care is taken to allow R12 to be used as index, which is a valid scenario.
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: x86@kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
arch/x86/mm/mpx.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
index 86c2d96..6a034bc 100644
--- a/arch/x86/mm/mpx.c
+++ b/arch/x86/mm/mpx.c
@@ -110,6 +110,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
regno = X86_SIB_INDEX(insn->sib.value);
if (X86_REX_X(insn->rex_prefix.value))
regno += 8;
+ /*
+ * If mod !=3, register R/ESP (regno=4) is not used as index in
+ * the address computation. Check is done after looking at REX.X
+ * This is because R12 (regno=12) can be used as an index.
+ */
+ if (regno == 4 && X86_MODRM_MOD(insn->modrm.value) != 3)
+ return -EDOM;
break;
case REG_TYPE_BASE:
@@ -158,11 +165,20 @@ static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs)
goto out_err;
indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
+ /*
+ * A negative offset generally means a error, except
+ * -EDOM, which means that the contents of the register
+ * should not be used as index.
+ */
if (indx_offset < 0)
- goto out_err;
+ if (indx_offset == -EDOM)
+ indx = 0;
+ else
+ goto out_err;
+ else
+ indx = regs_get_register(regs, indx_offset);
base = regs_get_register(regs, base_offset);
- indx = regs_get_register(regs, indx_offset);
addr = base + indx * (1 << X86_SIB_SCALE(sib));
} else {
addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM);
--
2.9.3
next prev parent reply other threads:[~2017-02-23 6:36 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-23 6:36 [PATCH v4 00/17] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-02-23 6:36 ` Ricardo Neri [this message]
2017-02-23 7:24 ` [PATCH v4 01/17] x86/mpx: Do not use SIB index if index points to R/ESP Peter Zijlstra
2017-02-23 9:50 ` Paul Crawford
2017-02-23 12:47 ` Coding style vs legibility [was Re: [PATCH v4 01/17] x86/mpx: Do not use SIB index if index points to R/ESP] Mouse
2017-02-23 22:17 ` [PATCH v4 01/17] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri
2017-02-24 2:33 ` Joe Perches
2017-02-24 2:41 ` Ricardo Neri
2017-02-24 14:47 ` Nathan Howard
2017-02-24 19:07 ` Ricardo Neri
2017-02-24 15:00 ` Adan Hawthorn
2017-02-23 6:36 ` [PATCH v4 02/17] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0 Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 03/17] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel Ricardo Neri
2017-02-23 10:54 ` kbuild test robot
2017-02-23 22:18 ` Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 04/17] x86/insn-eval: Add utility functions to get register offsets Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 05/17] x86/insn-eval: Add utility function to get segment selector Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 06/17] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 07/17] x86/insn-eval: Add utility function to get segment descriptor base address Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 08/17] x86/insn-eval: Add functions to get default operand and address sizes Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 09/17] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero Ricardo Neri
2017-02-23 6:36 ` [PATCH v4 10/17] insn/eval: Incorporate segment base in address computation Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 11/17] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 12/17] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 13/17] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 14/17] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 15/17] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-02-23 9:27 ` Peter Zijlstra
2017-02-23 22:15 ` Ricardo Neri
2017-02-24 19:11 ` Andy Lutomirski
2017-02-24 19:36 ` Ricardo Neri
2017-02-24 19:45 ` H. Peter Anvin
2017-02-23 6:37 ` [PATCH v4 16/17] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-02-23 6:37 ` [PATCH v4 17/17] selftests/x86: Add tests for " Ricardo Neri
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