RE: nandtest error

Jeff Lauruhn (jlauruhn)
2015-04-30T02:05:55Z

Hello zc;
The MT29F16G08CBACA is a 70 series part (25nm), 24 bit/1080 bytes of ECC vs MT29F32G08CBADA 80 series (20nm) 40 bits/1117 bytes of ECC, these are very different parts. ECC of 40 bits/1117 bytes will correct 320 bits per page and 81920 bits per block so if I read this correctly 31 of 81920 bits have flipped in this case. My point here is that with ECC correction this device will be good past the 3000 P/E cycles guaranteed, but if you look at any raw NAND without ECC correction you will very likely see some flipped bits. This is normal NAND behavior, especially on smaller nodes.

Jeff Lauruhn
NAND Application Engineer
Embedded Business Unit
Micron Technology, Inc

-----Original Message-----
From: linux-mtd [mailto:linux-mtd-bounces@lists.infradead.org] On Behalf Of Tee Zhen Cong
Sent: Wednesday, April 29, 2015 6:29 PM
To: Jeff Lauruhn (jlauruhn); 'Han Xu'
Cc: linux-mtd@lists.infradead.org
Subject: RE: nandtest error

Hi Jeff,
The flipped bits is found in the first 2Mbytes (1st block) of the NAND. It stops at the first block where errors are detected. I am not so sure what is happening in the nandtest application. It seems like a standard linux test tool for nand where many ppl use. So I use it for my test as well.
As far as I see, it erase, write then read back the NAND block by block, and see if the read back bytes are the same with the written bytes.
In my opinion, the flipped bits is not normal. I got another board with a useable 16GBit NAND (MT29F16G08CBACA). Using the nandtest application, it returns successful without any flipped bit. Same kernel, same software. Only different NAND.

Regards,
zc

-----Original Message-----
From: linux-mtd [mailto:linux-mtd-bounces@lists.infradead.org] On Behalf Of Jeff Lauruhn (jlauruhn)
Sent: Thursday, 30 April, 2015 5:12 AM
To: Han Xu; Tee Zhen Cong
Cc: linux-mtd@lists.infradead.org
Subject: RE: nandtest error

When you read the data back are you reading the raw data? Some amount of
bit flipping is normal NAND Flash behavior. ECC correction is required on all contemporary NAND to some degree to correct bit flips. This Micron device is designed to return a "FAIL" status only when the number of bad
bits in any page exceeds 40bits/1117 bytes.

I need to understand what nandtest is actually doing. If I read this right, if found 32 flipped bits in a 32 gigabit device. That's actually very good.

Jeff Lauruhn
NAND Application Engineer
Embedded Business Unit
Micron Technology, Inc

-----Original Message-----
From: linux-mtd [mailto:linux-mtd-bounces@lists.infradead.org] On Behalf Of Han Xu