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From: "Brian T" <btuch@usa.net>
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Date: Thu, 18 Mar 2004 10:52:18 -0600
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Subject: fix for Micron chips read mode
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Sending this in again since I think it was missed.  From the CVS I pulled
yesterday (3/18), Micron chips still appear to break.  I took the change
from jedec_probe.c and added an extra comment.  The current CVS breaks
Micron Q-Flash part # MT28F128J3 , and the below patch seems to fix it
because Micron requires an 0xFF for read mode.

Is it possible to add this to CVS?

Thanks,

-Brian


--- chips/cfi_util.c.orig       Tue Feb 17 15:32:24 2004
+++ chips/cfi_util.c    Thu Mar 18 10:11:44 2004
@@ -68,6 +68,14 @@
        /* Make sure it's in read mode */
        cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);

+        /* Some misdesigned intel chips do not respond for 0xF0 for a
reset,
+         * so ensure we're in read mode.  Send both the Intel and the AMD
command
+         * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
+         * this should be safe. ALSO Some Intel's Specify 0xFF, and Micron
+         * REQUIRES it.
+         */
+        cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
+
        return extp;
 }