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From: Michael Walle <michael@walle.cc>
To: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Cc: linux-mtd@lists.infradead.org,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] mtd: spi-nor: macronix: Add support for mx66l2g45g
Date: Mon, 23 May 2022 09:54:27 +0200	[thread overview]
Message-ID: <04c432289041752d113c15245361ade8@walle.cc> (raw)
In-Reply-To: <20220522054802.1719443-1-jiaqing.zhao@linux.intel.com>

Hi,

Am 2022-05-22 07:48, schrieb Jiaqing Zhao:
> Macronix mx66l2g45g is a 3V, 2Gbit (256MB) NOR flash that supports
> x1, x2, and x4 operation modes.

I presume this one supports SFDP? Please provide an SFDP dump, see [1].
If it supports SFDP please try to use the SNOR_ID3() macro [2].

Also please add what was tested in your commit message.

Same goes for your patch 2/2.

-michael

[1] 
https://lore.kernel.org/linux-mtd/4304e19f3399a0a6e856119d01ccabe0@walle.cc/
[2] 
https://lore.kernel.org/linux-mtd/20220510140232.3519184-1-michael@walle.cc/

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  parent reply	other threads:[~2022-05-23  8:26 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-22  5:48 [PATCH 1/2] mtd: spi-nor: macronix: Add support for mx66l2g45g Jiaqing Zhao
2022-05-22  5:48 ` [PATCH 2/2] mtd: spi-nor: micron: Add SPI_NOR_DUAL_READ flag on mt25ql02g Jiaqing Zhao
2022-07-21  7:59   ` Tudor.Ambarus
2022-05-23  7:54 ` Michael Walle [this message]
2022-05-23  8:50   ` [PATCH 1/2] mtd: spi-nor: macronix: Add support for mx66l2g45g Jiaqing Zhao
2022-05-23  8:56     ` Michael Walle
2022-05-23 10:12       ` Jiaqing Zhao
2022-05-23 11:59         ` Michael Walle
2022-05-23 12:18           ` Jiaqing Zhao

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