Re: [PATCH v3 1/3] mtd: spi-nor: otp: fix access to security registers in 4 byte mode

Pratyush Yadav
2021-05-20T17:41:36Z

On 20/05/21 05:58PM, Michael Walle wrote:
> The security registers either take a 3 byte or a 4 byte address offset,
> depending on the address mode of the flash. Thus just leave the
> nor->addr_width as is.
>
> Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes")
> Signed-off-by: Michael Walle <michael@walle.cc>

I have not done due diligence in researching this topic. But the premise
sounds good to me. So,

Acked-by: Pratyush Yadav <p.yadav@ti.com>

> ---
> drivers/mtd/spi-nor/otp.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
> index 61036c716abb..91a4c510ed51 100644
> --- a/drivers/mtd/spi-nor/otp.c
> +++ b/drivers/mtd/spi-nor/otp.c
> @@ -40,7 +40,6 @@ int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf)
> rdesc = nor->dirmap.rdesc;
>
> nor->read_opcode = SPINOR_OP_RSECR;
> - nor->addr_width = 3;
> nor->read_dummy = 8;
> nor->read_proto = SNOR_PROTO_1_1_1;
> nor->dirmap.rdesc = NULL;
> @@ -84,7 +83,6 @@ int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
> wdesc = nor->dirmap.wdesc;
>
> nor->program_opcode = SPINOR_OP_PSECR;
> - nor->addr_width = 3;
> nor->write_proto = SNOR_PROTO_1_1_1;
> nor->dirmap.wdesc = NULL;
>
> --
> 2.20.1
>

--
Regards,
Pratyush Yadav
Texas Instruments Inc.