Re: Handling multiple NAND chips

David Woodhouse
2003-07-26T15:07:29Z

On Sat, 2003-07-26 at 06:22, J.D. Bakker wrote:
> Ah, I see. Are you planning to always treat the NANDs as a linear
> array ?

Yeah -- I think so. Any reason not to?

> As I obviously have access to multi-NAND hardware, I'll
> happily beta-test this WIP.

Thanks ;)

> Polling should be possible through the Status Read command
> (0x70/0x71) anyway, right ? Or would you want hardware to generate an
> interrupt when any of the FR/B# lines change ? Hmmm...

During an erase, polling should be possible -- but what about waiting
for the chip to be ready after a reset, etc.? If another chip is
erasing, your FR/B# line is pulled low, I assume?

--
dwmw2