Support for Am29LV2562M NOR flash

[Shamile Khan <shamile@edgewater.ca>]

Hello,

I am new to MTD so bear with me. I tried getting MTD sources (as of end
July) to autodetect Am29LV2562M chip in x32 mode (16M * 32-bit). 

This chip contains two Am29LV256M chips (16M * 16-bit). However it seems
that it cannot be modelled as two interleaved x16 chips. This is because
the data bits are connected as DQ0-7 (chip1), DQ8-15 (chip2), DQ16-23
(chip1) and DQ24-31 (chip2) i.e it alternates between chips for every
byte. As far as I understand, two x16 chips interleaved have the
configuration DQ0-DQ16 (chip 1), DQ17-31 (chip2). As a consequence, the
command sequences I require are of the form 0x0000XXXX instead of
0x00XX00XX (which MTD supports for interleaved flash chips as I verified
in another board). XX refers to the data part of the command e.g 98 for
CFI query. 

I am wondering if I am missing something here. Does MTD support the
flash geometry for Am29LV2562M? 

Thanks,
Shamile
-- 
Shamile Khan
Edgewater Computer Systems, Inc.
1125 Innovation Drive
(2nd Floor)
Kanata, Ontario, K2K 3G6
Tel: (613) 271-1101 ext. 240
Fax: (613) 271-1152