Re: [PATCH] AT91RM9200 NAND support

[Thomas Gleixner <tglx@linutronix.de>]

On Tue, 2006-06-20 at 14:44 +0200, Thomas Gleixner wrote:
> Savin,
> 
> On Tue, 2006-06-20 at 14:28 +0200, Savin Zlobec wrote:
> > Chip not ready in nand_command():
> > Last caller: c012aa04 (nand_base.c:389)
> > Last command: 0x70
> > Current caller: c012c0e8 (nand_base.c:1720)
> > Current command: 0x60
> > 
> > 384     static int nand_check_wp(struct mtd_info *mtd)
> > 385     {
> > 386             struct nand_chip *chip = mtd->priv;
> > 387             /* Check the WP bit */
> > 388             chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
> > 389             return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
> > 390     }
> >
> > 1715    static void single_erase_cmd(struct mtd_info *mtd, int page)
> > 1716    {
> > 1717            struct nand_chip *chip = mtd->priv;
> > 1718            /* Send commands to erase a block */
> > 1719            chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
> > 1720            chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
> > 1721    }
> 
> The status command does not influence ready/busy. The one before that
> nand_check_wp() call, is a chip reset command, but we wait for the chip
> to become ready again.
> 
> Please give me the exact part number, so I can lookup the data sheet.

Oops, looked at the wrong place. The culprit is elsewhere.

Please replace the debug patch by the one below.

	tglx

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 77406fc..b61a534 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -430,6 +430,9 @@ static void nand_wait_ready(struct mtd_i
 	led_trigger_event(nand_led_trigger, LED_OFF);
 }
 
+static void *last_caller;
+static int last_command;
+
 /**
  * nand_command - [DEFAULT] Send command to NAND device
  * @mtd:	MTD device structure
@@ -446,6 +449,22 @@ static void nand_command(struct mtd_info
 	register struct nand_chip *chip = mtd->priv;
 	int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
 
+	if (command != NAND_CMD_RESET && command != NAND_CMD_STATUS) {
+
+		if (chip->dev_ready && !chip->dev_ready(mtd)) {
+			printk("Chip not ready in nand_command():\n");
+			printk("Last caller: %p\n", last_caller);
+			printk("Last command: 0x%02x\n", last_command);
+			printk("Current caller: %p\n",
+			       __builtin_return_address(0););
+			printk("Current command: 0x%02x\n", command);
+
+			nand_wait_ready(mtd);
+		}
+		last_caller = __builtin_return_address(0);
+		last_command = command;
+	}
+
 	/*
 	 * Write out the command to the device.
 	 */